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Single-event-proximity-effect-resistant static storage unit of physical space interleaving type

A storage unit and anti-single event technology, applied in static memory, information storage, digital memory information, etc., can solve the problems of serious charge sharing and no specific solutions

Active Publication Date: 2012-11-21
NO 771 INST OF NO 9 RES INST CHINA AEROSPACE SCI & TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] With the further shrinking of the process size, in SRAM memory cells, the charge sharing caused by the second type of proximity effect will become more and more serious, and no specific solutions have been proposed yet.

Method used

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  • Single-event-proximity-effect-resistant static storage unit of physical space interleaving type
  • Single-event-proximity-effect-resistant static storage unit of physical space interleaving type
  • Single-event-proximity-effect-resistant static storage unit of physical space interleaving type

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Embodiment Construction

[0040] The present invention is described in further detail below in conjunction with accompanying drawing:

[0041] see Figure 1-3 , see figure 1 , this schematic diagram contains two 6-tube SRAM storage units, that is, 12-tube dual SRAM storage units, and these two storage units are called A storage unit and B storage unit. The connections and devices beginning with the letter A belong to the A storage unit, and the connections and devices beginning with the letter B belong to the B storage unit. Since the storage unit is left-right symmetrical, for the convenience of explanation, we split the two storage units into 4 parts in this schematic diagram, that is, the A storage unit is divided into 0.5A and 0.5A along the symmetrical midline, and the B storage unit is divided into 0.5A and 0.5A along the The symmetrical midline splits into 0.5B and 0.5B. These four parts are no longer arranged in order of 0.5A, 0.5A, 0.5B, and 0.5B, but staggered in such a way as 0.5A, 0.5B, ...

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PUM

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Abstract

The invention discloses a single-event-proximity-effect-resistant static storage unit of a physical space interleaving type. The static storage unit comprises a transistor of a storage unit A and a transistor of a storage unit B, wherein the transistor of storage unit A is composed of a first access transistor AMG1 of the storage unit A, a second access transistor AMG2 of the storage unit A, a first pull-up transistor AMP1 of the storage unit A, a second pull-up transistor AMP2 of the storage unit A, a first pull-down transistor AMN1 of the storage unit A and a second pull-down transistor AMN2 of the storage unit A, which are arranged on a silicon substrate; and the transistor of the storage unit B is composed of a first access transistor BMG1 of the unit B, a second access transistor BMG2 of the unit B, a first pull-up transistor BMP1 of the unit B, a second pull-up transistor BMP2 of the unit B, a first pull-down transistor BMN1 of the unit B and a second pull-down transistor BMN2 of the unit B, which are arranged on the silicon substrate. Proximity effect can be effectively reduced by adopting the invention, and therefore, the critical charges of SEU (Single Event Upset) of thestorage units are enlarged to enhance the single event resistance.

Description

Technical field: [0001] The invention belongs to the field of static memory, and relates to a static memory unit, in particular to a physical space interleaved static memory unit resistant to single particle proximity effect. Background technique: [0002] As CMOS process feature sizes and power supply voltages continue to decrease, CMOS devices face significant reliability challenges. Single event upset (SEU) of CMOS memory cells is one of the challenges. When particles are incident on the sensitive area of ​​the memory cell (usually the drain region of the closed NMOS), the transistor in the memory cell collects the charge to change the content stored in the memory cell. At this time, the memory cell is said to have SEU. [0003] The advancement of semiconductor CMOS technology has reduced the size of devices, the distance between transistors in a memory cell has become smaller and smaller, and the proximity effect has become more and more serious. The so-called proximit...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C11/412
Inventor 谢成民王忠芳李如美吴龙胜刘佑宝
Owner NO 771 INST OF NO 9 RES INST CHINA AEROSPACE SCI & TECH
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