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Device and method for removing deadlock of I<2>C (Inter-Integrated Circuit) bus

A bus and deadlock technology, applied in the field of communication, can solve the problems of C bus deadlock, increase system cost, reduce the reliability and stability of C bus, reduce cost, improve reliability and stability, and eliminate deadlock. Effect

Active Publication Date: 2013-05-08
UNITED INFORMATION TECH +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the above-mentioned invention patents cannot solve the I 2 The problem of C bus locking; if I 2 There are multiple master devices and multiple slave devices connected to the C bus. The above invention patent needs to add multiple reset lines to detect the reset signal, which not only increases the cost of the system, but also increases the complexity of the entire device signal.
[0006] In summary, existing I-based 2 C-bus systems may be connected to the I 2 The failure of a certain device on the C bus leads to the I 2 C bus deadlock, lowering the I 2 C-bus reliability and stability, the elimination of existing I 2 The method of C bus deadlock needs to be further improved

Method used

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  • Device and method for removing deadlock of I&lt;2&gt;C (Inter-Integrated Circuit) bus
  • Device and method for removing deadlock of I&lt;2&gt;C (Inter-Integrated Circuit) bus
  • Device and method for removing deadlock of I&lt;2&gt;C (Inter-Integrated Circuit) bus

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Embodiment Construction

[0046] In order to make the object, technical solution, and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and examples.

[0047] The present invention provides a way to eliminate I 2 The device and method for C bus deadlock adopt different deadlock elimination methods and devices according to the different states of SCL and SDA obtained through detection; I 2 The connection of the C bus is used to find the faulty device; when SCL is high and SDA is low for more than the preset value, by outputting a clock signal longer than one read data cycle or write data cycle to SCL; in the detection until SDA is low and the number of output clock signals exceeds the preset number of times, by disconnecting the device from the I 2 C-bus connection to find a failed device to bring SDA back high.

[0048] figure 2 Eliminate I for the present invention 2 A schematic structural diag...

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Abstract

The invention provides a device for removing deadlock of an I<2>C (Inter-Integrated Circuit) bus, wherein a detection unit of the device detects that an SCL (Serial Clock Line) is at a high level and the time of SDA (Serial Data Line) at a low level exceeds a preset first threshold, and a clock trigger signal is output to a clock unit; the clock unit generates a clock signal according to the clock trigger signal and outputs the clock signal to the SCL. The invention further provides a method for removing deadlock of an I<2>C bus, comprising the following steps: when detecting that the SCL is at the high level and the time of the SDA at the low level exceeds the preset first threshold, generating a clock signal and outputting the clock signal to the SCL; and when detecting that the SDA is restored to the high level, stopping outputting the clock signal. By utilizing the device and method provided by the invention, the cost is lower, the deadlock of the I<2>C bus is removed simultaneously, and the stability and reliability of the I<2>C bus are improved.

Description

technical field [0001] The present invention relates to communication technology, in particular to a method for eliminating I 2 A device and method for C bus deadlock. Background technique [0002] Inter-IC Bus (Inter-IC Bus, I 2 C) is a set of serial buses developed by Philips for connecting microcontrollers and their peripherals. I 2 The C bus has two signal lines, a clock line SCL and a bidirectional data line SDA. All connected to I 2 The clock lines SCL of devices on the C bus are connected to the I 2 SCL in the C bus, all connected to the I 2 The data lines SDA of devices on the C bus are connected to the I 2 The bidirectional data line SDA in the C bus. in I 2 In the C bus, when a device generates the clock signal SCK on the bus and initiates data transmission, it is called a sending device or a master device, and when a device receives control information or data from the bus, it is called a receiving device or a slave equipment. The master device or sendi...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F13/40G06F13/42
Inventor 陈宏彬
Owner UNITED INFORMATION TECH
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