Method o encapsulating a wafer level microdevice

Abstract

The present invention discloses a method of encapsulating a wafer level microdevice, which includes: fabricating a microdevice on top side of a first silicon wafer; depositing a first capping carbon film on the top side of the first silicon wafer; implementing a backside fabricating process of wafer from bottom side of the first silicon wafer by carrying the top side of the first silicon wafer through the first capping carbon film; removing the first capping carbon film by selective gaseous reaction with carbon; and encapsulating an encapsulation wafer onto the top side of the first silicon wafer. The present invention deposits and removes the first capping carbon film by means of chemical technology, thereby protecting the microdevice on the top side of the first wafer during implementing the backside fabricating process of wafer. The top side does not need to be protected through the encapsulation wafer before implementing the backside fabricating process of wafer, which makes the wafer thinner and convenient to be handled.

Description

technical field [0001] The invention relates to packaging technology, in particular to a packaging method for wafer-level micro devices formed on wafers. Background technique [0002] Many advanced silicon-based microdevices combine various optional microcomponents and basic microelectronic devices on a silicon substrate. The silicon substrate can also be called a silicon wafer. The microcomponents can be mechanical, optical, or chemical. , biological or other types of physical components. Many of these microcomponents need to be encapsulated in tiny or nanoscale cavities formed on the top surface of a silicon substrate. From the formation of microelectronic devices and optional microcomponents, to the formation and packaging of micro-cavities or nano-cavities, micro-devices are preferably able to complete the fabrication process on silicon substrates through a unified wafer-level fabrication process. [0003] However, electronic input and output interface parts are formed...

AI Technical Summary

Problems solved by technology

While this provides physical protection for the microcomponents fabricated on the top side of the silicon wafer from backside thinning, as well as potential mechanical damage and chemical contamination during TSV and interconnect fabrication, it adds significantly to the wafer stack thickness, typically Will grow to twice the thickness of a standard silicon wafer

This creates wafer handling issues during wafer backside preparation for thinning and TSV formation

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