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Full-flow 128-bit-accuracy floating-point accumulator based on full expansion

An accumulator and floating-point technology, which is applied to calculations using the number system and calculations using non-contact manufacturing equipment, and can solve problems such as undiscovered floating-point accumulators

Inactive Publication Date: 2010-10-13
NAT UNIV OF DEFENSE TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0009] In the existing accumulator design, there is no report of using the FPGA chip to realize the fully expanded, fully pipelined 128-bit precision floating point accumulator

Method used

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  • Full-flow 128-bit-accuracy floating-point accumulator based on full expansion
  • Full-flow 128-bit-accuracy floating-point accumulator based on full expansion
  • Full-flow 128-bit-accuracy floating-point accumulator based on full expansion

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Experimental program
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Embodiment Construction

[0053] figure 1 is a general block diagram of an existing accumulator. The existing floating-point accumulator is designed according to the idea of ​​cyclically performing floating-point addition operations, and is mainly composed of an order unit, an adder and a normalization unit. The normalization section consists of a leading zero count section, a normalization shift section, and a normalization rounding section. The pair-order component receives operand A and operand B input from the outside, and shifts the mantissa of the operand with a small exponent to the right according to the exponent difference between the two operands, and aligns it with the mantissa of the operand with a large exponent. The adder reads two operands from the pair-order part to add, and inputs the addition result to the leading zero counting part and the normalized shifting part; the leading zero counting part calculates the number of leading zeros according to the addition result, and puts the l...

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Abstract

The invention discloses a full-flow 128-bit-accuracy floating-point accumulator based on full expansion. The main technical problem to be solved is to provide an accumulator for realizing lossless accuracy accumulation. The full-flow 128-bit-accuracy floating-point accumulator based on full expansion comprises a normalized module and a full-expansion floating-point accumulator module which comprises a mantissa addition module, a memory module and a rapid carry module, the memory module comprises four memories, a counter and four selectors, the mantissa addition module comprises a complementation part, a shifting part, an operator A register, an operator B register, an addition module, an addition result register and a first flag upgrading part, and the rapid carry module comprises a carry termination factor address generating part, a carry termination factor address register, a carry termination factor generating part, a carry information register, a carry termination factor register, a carry adder, a carry addition result register and a second flag upgrading part. The accumulator of the invention has improved accuracy and speed.

Description

technical field [0001] The invention relates to a microprocessor in the field of integrated circuits, in particular to a fully expanded and fully pipelined 128-bit precision floating-point accumulator. Background technique [0002] Since the birth of the computer, its computing speed and computing power have been greatly improved, from 1 billion times / second (Gigascale) of Cray2 in 1985 to the current petascale / second (Petascale). It is estimated that by 2015, it will reach Exascale, which means that the computer will be able to perform 1018 standard IEEE754 double-precision floating-point operations per second. The improvement of the computer's computing speed and computing power means that it can meet the needs of practical applications in a wider range, but this also brings a new problem: the floating-point operation process will produce rounding errors, and with the calculation scale The error will continue to accumulate, which may cause the final calculation result to ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F7/50
Inventor 窦勇雷元武郭松
Owner NAT UNIV OF DEFENSE TECH
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