Array substrate and manufacturing method thereof and liquid crystal panel and manufacturing method thereof
A manufacturing method and technology of array substrates, which are applied in semiconductor/solid-state device manufacturing, optics, instruments, etc.
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no. 1 example
[0057] image 3 It is a flow chart of the first embodiment of the manufacturing method of the array substrate of the present invention. Such as image 3 As shown, the manufacturing method of the array substrate of the present invention includes:
[0058] Step 101, providing a substrate, the substrate includes a plurality of liquid crystal panel regions and a plurality of cutting regions, the cutting regions are located between adjacent liquid crystal panel regions, so as to isolate each of the liquid crystal panel regions;
[0059] Step 102, forming gate lines and gate electrodes on the substrate;
[0060] Step 103, depositing a gate insulating film on the substrate on which the gate lines and gate electrodes are formed, and forming an active layer, data lines, source electrodes, drain electrodes and channels on the gate electrodes;
[0061] Step 104, depositing a passivation film on the substrate on which the data line, source electrode, drain electrode and channel are for...
no. 3 example
[0074] Figure 5a It is a flow chart of the third embodiment of the manufacturing method of the array substrate of the present invention. Figure 5b It is a schematic diagram of the substrate provided in the third embodiment of the manufacturing method of the array substrate of the present invention. Figure 5c It is a schematic diagram of forming gate lines and gate electrodes in the third embodiment of the manufacturing method of the array substrate of the present invention. Figure 5d It is a schematic diagram of forming an active layer, a data line, a source electrode and a drain electrode in the third embodiment of the manufacturing method of the array substrate of the present invention. Figure 5e It is a schematic diagram of forming a passivation layer via hole and a pixel electrode in the third embodiment of the manufacturing method of the array substrate of the present invention. Figure 5f It is a schematic diagram of removing the gate insulating film and the passi...
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