Processor capable of multiplexing member for floating point operation and member for vector operation

Abstract

The invention provides a processor capable of multiplexing a member for floating point operation and a member for vector operation. The processor comprises a functional component for vector operation and a register file for vector operation, wherein the functional component for vector operation has the all function of a functional component for floating point operation and processes the floating point operation as the vector operation, and the register file for vector operation can be taken as not only a register for vector operation but also a register for floating point operation and has the same register number to lead the register for floating point operation to be mutually associated with the register for vector operation. The functional component for vector operation executes the floating point operation, thereby reducing the realization complexity, reducing the area of the processor, saving the hardware resources, and reducing the realization cost of the processor. Furthermore, the register file for vector operation is partially multiplexed as the register for floating point operation on the basis of the register number, so that on instruction operation for moving data between the register for floating point operation and the register for vector operation can be saved, thereby effectively improving the instruction execution efficiency of the processor.

Description

technical field [0001] The present invention relates to the architecture of a microprocessor, in particular to a processor capable of multiplexing components for floating-point operations and components for vector operations. Background technique [0002] With the rapid development of high computing-intensive application fields such as scientific computing, multimedia, network communication, and digital signal processing, higher and higher requirements are placed on the data processing capability of processors. Vector computing is an effective method to improve data parallel processing capability, so processors generally introduce vector computing instructions. The traditional processor is a structure in which the vector processing unit is paralleled with the floating-point and fixed-point processing units, that is, in addition to the registers and functional units for fixed-point and floating-point operations, it also has independent registers and functional units for vecto...

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Problems solved by technology

[0003] For the above traditional structure, the data transfer between the vector operation and the floating-point operation must be carried out through the shift instruction, and the shift instruction is generally executed in the memory access unit, so there are disadvantages of slow execution speed and low data efficiency

[0004] In addition, since the registers for floating-point operations and the registers for vector operations, as well as the functional components for floating-point operations and the functional components for vector operations, are integrated into one set, the above-mentioned traditional structure also has the disadvantages of large processor area and high hardware implementation cost.

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