1553B bus monitor and bus system with same

Abstract

The invention discloses a 1553B bus monitor. A local bus module of the 1553B bus monitor connected with a PCI bus comprises a PCI master equipment unit and a PCI slave equipment unit, wherein the PCI master equipment unit and the PCI slave equipment unit provide a 32-bit PCI interface together; the PCI slave equipment unit supports passive access; and the PCI master equipment unit realizes direct memory transmission and actively transmits data to memory space pre-allocated by a central processing unit (CPU). This invention also discloses a 1553B bus system with the 1553B bus monitor. The 32-bit 1553B bus monitor adopting PCI interface design can be conveniently hung to the PCI bus outside a microprocessor, has processing bandwidth of 32 bits, integrates DMA modules, can automatically initiate data transmission after CPU configuration, supports a BURST transmission mode, and greatly improves the efficiency of data transmission.

Description

technical field [0001] The invention relates to a 1553B controller, in particular to a 1553B bus monitor and a 1553B bus system with the 1553B bus monitor. Background technique [0002] The 1553B bus is the abbreviation of the MIL-STD-1553 bus, and the full name of the MIL-STD-1553 bus is the time-division command / response multiplexed data bus inside the aircraft. The 1553B data bus standard is a serial multi-channel data bus standard announced by the United States in the 1970s, that is, a protocol for transmission between devices. 1553B bus can hang 31 remote terminals, it has three terminal types: bus controller (BC), remote terminal (RT) and bus monitor (BM); the information format is BC to RT, RT to BC, RT to RT , broadcast mode and system control mode; the transmission medium is shielded twisted pair, and the 1553B bus coupling methods include direct coupling and transformer coupling; the 1553B bus is a multi-redundancy bus topology structure with bidirectional transmi...

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Problems solved by technology

[0010] To sum up, the 16-bit 1553B MT controller in the prior art is not easy to be connected to the PCI bus outside the microprocessor, the processing bandwidth is limited to 16 bits, and the DMA module with good characteristics cannot be integrated, and it cannot be automatically configured after the CPU is configured. Initiate data transmission and also support BURST transmission mode, the efficiency of data transmission is greatly limited

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