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Method for storing multiple virtual queues data based on FPGA

A data storage and virtual queue technology, applied in the data storage field of multiple virtual queues, can solve problems such as slow storage speed, long storage cycle, and insufficient logical resources, and achieve the effects of shortening the cycle, improving read and write efficiency, and convenient and flexible control

Active Publication Date: 2009-12-09
南京城市云计算中心有限公司
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  • Abstract
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AI Technical Summary

Problems solved by technology

[0006] In order to solve the above problems such as insufficient logic resources, slow storage speed, and long storage cycle, this design uses a clever design method to store and process all the registers in a large number (such as 2048) queues using the block RAM in the FPGA. Realize simultaneous reading and writing of related registers in the same queue

Method used

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  • Method for storing multiple virtual queues data based on FPGA
  • Method for storing multiple virtual queues data based on FPGA
  • Method for storing multiple virtual queues data based on FPGA

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Embodiment Construction

[0094] Below in conjunction with accompanying drawing, the present invention will be further described.

[0095] The present invention provides a kind of method based on FPGA multi-virtual queue data storage, comprises network card, FPGA, and described FPGA comprises block memory (block ram), MAC controller module, DMA controller, PCIe controller module, its special The advantage is that:

[0096] Described FPGA is provided with receiving engine module (Rx engine), sending engine module (Tx engine), read-write module (Reg_Rd_Wr), receiving engine module (Rx engine) passes through read-write module (Reg_Rd_Wr) and sending engine module (Tx engine) ) connection, the receiving engine module (Rx engine) realizes the processing and classification of the data packets sent from the host, and the sending engine module (Tx engine) realizes the packaging of the data sent by the user to the host, and sends them to the core interface according to the corresponding timing, read and write ...

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Abstract

The invention is a method for storing multiple virtual queues data based on FPGA. The invention is designed based on the technology realizing the network card data read-write in FPGA, in particular to a method of storing multiple virtual queues data, adopting a plurality of register blocks which contain a receiving engine module, a read-write module and a block-shaped memory; wherein, each register block belongs to one of the queues, the block-shape memory is provided with a read-write mode state switching module, both the lock-shaped memory and the read-write mode state switching module are in support of three operational modes and uses the block RAM in the FPGA to store and process all registers in a large number of queues (like 2048 queues), thus realizing simultaneous reading and writing on the related registers in the same queue. The method provided in the invention solves the problems of insufficient logical resources, slow storage speed, long storage cycle and the like in the logical storage and external storage in the prior art.

Description

technical field [0001] The design of the present invention is based on the technology of realizing high-speed network card data reading and writing in FPGA, and in particular relates to a data storage method of multiple virtual queues. Background technique [0002] Virtualization technology is a hot spot in the current market, and the use of virtualization technology can save up to 70% of hardware costs. Because virtualization technology can help users merge multiple application workloads, run multiple operating environments on a single system; optimize application development, test and develop on a single system; improve system availability, and migrate virtual environments between systems. The current design mainly uses logic storage and external storage, and external storage mainly uses DDR2_SDRAM, FLASH and other storage. [0003] In the case of logical storage: the virtualization technology used to realize the high-speed virtual network card design in the FPGA requires...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C7/00G11C11/401G11C16/06
Inventor 曾宇方信我郑臣明白宗元
Owner 南京城市云计算中心有限公司
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