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Network real-time video collecting apparatus developed based on FPGA chip and DSP chip

A real-time video and acquisition device technology, applied in selective content distribution, pulse-modulated TV signal transmission, electrical components, etc. problem, to achieve the effect of low cost, simple and easy-to-use protocol

Inactive Publication Date: 2009-07-08
XI AN JIAOTONG UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Common video acquisition devices can only support the acquisition of PAL / NTSC analog video signals, and there are problems such as low resolution, no support for computer VGA interface video signal acquisition, and no support for real-time network transmission. Security, industry, automotive assisted driving and other fields require high-resolution acquisition, implementation and processing

Method used

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  • Network real-time video collecting apparatus developed based on FPGA chip and DSP chip
  • Network real-time video collecting apparatus developed based on FPGA chip and DSP chip
  • Network real-time video collecting apparatus developed based on FPGA chip and DSP chip

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Embodiment Construction

[0023] see figure 1 , the network real-time video acquisition device is made of FPGA chip 210 and DSP chip 130, comprises video acquisition module 100, video signal processing module 200, network control module 300, handshake control module and upper computer terminal interaction module of button switch and network protocol. The main processor is a DSP chip 130, and the DSP chip 130 has a video and audio input and output interface (VP) and an Ethernet interface. The video signal input by the camera or computer VGA interface is converted into a digital RGB signal through an analog video decoder chip (Decoder) 110 and an analog-to-digital conversion chip (ADC) 120, and the digital RGB signal is converted into chromaticity space by the FPGA chip 210. Down-frequency processing and data rearrangement, and then the brightness signal Y is sent to the DSP chip 130, and after being stored in the external SDRAM, the DSP chip 130 sends the corresponding video data to the PC. The contro...

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Abstract

The present invention discloses a network real-time video collecting device based on FPGA chip and DSP chip development. The device of the invention comprises a video collecting module, a video signal processing module, a network control module, a handshake control module of press button switch and network protocol and an upper machine terminal alternation module. The device realizes the high-speed real-time collection and network transmission to analog video signal / analog television signal or high resolution computer signal. Based on the network handshake protocol between the upper machine and video collecting device which are developed independently on the video collection hardware platform, the specific data in the negotiation package can be flexibly set for controlling the working state of collecting device and realizing the network intelligent control of a plurality of video collecting devices. The device is composed of small-capability FPGA chip and intermediate-performance DSP chip, and can be widely used for the fields of enterprise / family guarding system, real-time video monitoring of operating interface of computer device, visual auxiliary drive of intelligent vehicle, etc.

Description

Technical field: [0001] The invention belongs to the technical field of wireless communication, and relates to a network real-time video acquisition device, in particular to a network real-time video acquisition device developed based on an FPGA chip and a DSP chip. Background technique [0002] Video acquisition is to solve the problem of obtaining video information. Because the digitized signal is easy to store and process, the video acquisition process generally obtains the analog video signal / analog TV signal CVBS / S-Video (PAL / NTSC system) by the CCD or CMOS camera, and the analog video decoding chip (Decoder) 110 by the analog video decoder Decode and output the digital luminance signal Y conforming to the ITU601 standard, and then perform digital image processing, storage, network transmission and other operations on the digital luminance signal Y. Among them, the field rate of the PAL system is 25fps, and the resolution is 720×288; the field rate of the NTSC system i...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04N7/24H04L29/06H04N21/24H04N21/643
Inventor 葛晨阳刘瑜郑豪刘荣国张斌
Owner XI AN JIAOTONG UNIV
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