Implementing method for low-density parity check code
A low-density parity and realization method technology, applied in the field of codec, can solve the problems of large storage space, high coding complexity of LDPC code, large storage capacity, etc.
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Embodiment 1
[0059] In this embodiment, the rule (4608, 2304) LDPC code is taken as an example for illustration. The code length N of the regular LDPC code to be realized in this embodiment is 4608, the row weight ρ=6, and the code rate v=1 / 2. It can be seen from the corresponding relationship between the code rate, the code length and the number of check equations that the number of check equations in the check matrix in this embodiment is M=4608-2304=2304. In addition, in this embodiment, the implementation process of the above-mentioned quasi-cyclic LDPC code will be described by taking a cyclic sub-matrix with 72 rows×72 columns as the minimum cyclic unit as an example.
[0060] The method flow chart of this embodiment and figure 2 The flow chart of the exemplary method of the present invention shown is similar, see figure 2 , the realization method of QC-LDPC code in the present embodiment comprises the following steps:
[0061] In step 201, according to the preset code length, c...
Embodiment 2
[0089] In this embodiment, an irregular LDPC code with the same row weight (4608, 2304) is taken as an example for illustration. The code length N of the regular LDPC code to be realized in this embodiment is 4608, the row weight ρ=7, and the code rate v=1 / 2. From the correspondence between the code rate, the code length and the number of check equations, it can be known that this The number of check equations in the check matrix of the embodiment is M=4608-2304=2304. In addition, in this embodiment, the same as the first embodiment, a 72×72 cyclic sub-matrix is taken as an example to illustrate the implementation process of the above-mentioned quasi-cyclic LDPC code.
[0090] The method flow chart of this embodiment and figure 2 The flow chart of the exemplary method of the present invention shown is similar, see figure 2 , the realization method of QC-LDPC code in the present embodiment comprises the following steps:
[0091] In step 201, according to the preset code ...
Embodiment 3
[0117]In this embodiment, an irregular LDPC code with (4608, 3096) row weights is taken as an example for illustration. The code length N of the regular LDPC code to be realized in this embodiment is 4608, the row weight ρ=12 or 13, and the code rate v=43 / 64, as can be seen from the correspondence between the code rate, the code length and the number of check equations , the number of check equations in the check matrix in this embodiment is M=4608-3096=1512. In addition, in this embodiment, the same as the first embodiment, a 72×72 cyclic sub-matrix is taken as an example to illustrate the implementation process of the above-mentioned quasi-cyclic LDPC code.
[0118] The method flow chart of this embodiment and figure 2 The flow chart of the exemplary method of the present invention shown is similar, see figure 2 , the realization method of QC-LDPC code in the present embodiment comprises the following steps:
[0119] In step 201, according to the preset code length, c...
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