External memory storage interface

Abstract

The invention discloses an external memory interface consisting of a control unit, an address output channel, a reading-writing and chip-selection unit, a data input channel and a data output channel, wherein, the three 32-bit address mapped registers are designed in the control unit, which ensures that a 32-bit digital signal processor has the ability of interacting with a multiple bit-width external memory. The interface can synchronously make access operations to an 8-bit external memory, a 16-bit external memory and a 32-bit external memory, thereby improving the extensibility and the working flexibility of the 32-bit digital signal processor; at the same time, the interface has a simple structure, is easy to control and miniaturize, and is convenient to be realized on the chips.

Description

technical field [0001] The invention relates to a high-performance digital signal processor interface, in particular to an external memory interface of a high-performance digital signal processor and a realization method thereof. Background technique [0002] Since the advent of digital signal processors, it has provided the development of digital signal processing technology with its unique characteristics of stability, repeatability, large-scale integration, especially programmability and easy adaptive processing of digital devices. a broad platform. However, the data width of the external memory usually has multiple bit widths, so whether the external memory can support multiple bit widths will directly affect the scalability and flexibility of the digital signal processor. At present, the external memory interface of most digital signal processors is not flexible enough for data access, and only supports data access with a fixed bit width, although there is a digital si...

AI Technical Summary

Problems solved by technology

However, the data width of the external memory usually has multiple bit widths, so whether the external memory can support multiple bit widths will directly affect the scalability and flexibility of the digital signal processor

At present, the external memory interface of most digital signal processors is not flexible enough for data access, and only supports data access with a fixed bit width, although there is a digital signal processor SMDSP that supports 32-bit instructions and 32-bit data, and allows external memory. The data width is 8-bit, 16-bit or 32-bit, and code can also be executed from 16-bit or 32-bit wide external memory, but its external memory interface does not have the ability to interact with multi-bit wide memory, which limits this type of digital Scalability and flexibility of signal processors

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