Method for realizing bare nucleus software debugging in multicore processor

A technology for multi-core processors and debugging tasks, applied in the field of communications, can solve problems such as inability to debug multi-core processors, and achieve the effects of facilitating development and debugging, shortening solution time, and enhancing competitiveness

Inactive Publication Date: 2008-03-05
ZTE CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The purpose of the present invention is to provide a method for implementing software debugging in the field of communication by using a multi-core processor, so as to solve the problem that part of the core of the multi-core processor is used for data plane processing without running the operating system.

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  • Method for realizing bare nucleus software debugging in multicore processor
  • Method for realizing bare nucleus software debugging in multicore processor
  • Method for realizing bare nucleus software debugging in multicore processor

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Embodiment 1

[0034] When the multi-core processor is limited by the allocation of IP addresses, the software debugging solution shown in Figure 3 can be used. Correspondingly, the debugging single board of the multi-core processor adopts the structural setting shown in Figure 1 . With this implementation method, the control plane core is required to act as a proxy, and the debugging request information is distributed to the data plane core for the second time. The control plane core 103 in FIG. 3 acts as a proxy. After the distributor extracts the destination IP address, it judges that the IP address is identical to the IP address of the data plane core (105, 106), then through the proxy of the control plane core 103, the distributor distributes the debugging notification information to the data plane core (105) for the second time. , 106). If after the distributor extracts the destination IP address, it judges that the IP address is the same as the IP address of the control plane core 104...

Embodiment 2

[0054]When the multi-core processor is not limited by the number of IP addresses, the software debugging scheme shown in FIG. 4 can be used. Correspondingly, the debugging single board of the multi-core processor adopts the structural setting shown in FIG. 2 . With this implementation method, the control plane core is not required to act as a proxy. After the distributor extracts the destination IP address, it can determine that the IP address is consistent with one or more IP addresses in the control plane core (103, 104) or data plane core (105, 106). If they are the same, the distributor directly sends debugging notification information to the control plane cores (103, 104) or data plane cores (105, 106).

[0055] The second embodiment is described in detail below, the method for realizing bare-core software debugging in the multi-core processor of the present invention, please refer to accompanying drawing 4, and its implementation process includes the following steps:

[...

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Abstract

The method comprises: the debug port receives the debug requesting message and saves it into the shared memory, and sends said debug requesting message to the distributor; according to the configuration rule, after the distributor extracts the destination IP address and confirms it is identical with the preset IP address in the multi-core processor, it outputs the debug notice message to said multi-core processor; after receiving the debug notice message, the multi-core processor executes the debug task.

Description

technical field [0001] The invention relates to the communication field, in particular to a method for realizing bare-core software debugging in a multi-core processor. Background technique [0002] With the advent of the information age and the continuous emergence of various new technologies and services, users have higher and higher bandwidth requirements for both mobile communications and data communications. In order to meet the high bandwidth requirements of a single user, operators require mobile communication equipment and data communication equipment to have large capacity, high access and high processing performance. In order to meet the requirements of large capacity, high access and high processing performance, a large number of multi-core processors with high processing capabilities have been used in mobile communication devices and data communication devices. [0003] A multi-core processor is a processor that integrates multiple cores on a single chip. At the...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/36
Inventor 郭树波
Owner ZTE CORP
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