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Multi-bit continuous-time front-end sigma-delta adc using chopper stabilization

A time-to-connect technique used in differential modulation, analog-to-analog conversion, electrical components, etc.

Active Publication Date: 2007-09-26
ANALOG DEVICES INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, one limitation that restricts the use of continuous-time ADCs is flicker noise

Method used

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  • Multi-bit continuous-time front-end sigma-delta adc using chopper stabilization
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  • Multi-bit continuous-time front-end sigma-delta adc using chopper stabilization

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Embodiment Construction

[0024] The present invention will be described below with reference to certain embodiments and drawings, but the invention is not limited thereto but only by the claims. The drawings described are only schematic and non-limiting.

[0025] The invention is not limited in its application to the details of construction and arrangement of parts set forth in the following description or illustrated in the drawings. The invention is capable of other embodiments and of being practiced or carried out in various ways. Also, the phraseology and terminology used herein are for the purpose of description and should not be regarded as limiting. As used herein, "including", "comprising", "having", "containing", "involving" and variations thereof are meant to include the following listed items and its equivalents and additional items. Furthermore, the terms "first", "second", "third", etc. in the description and claims are used to distinguish between similar elements and not necessarily t...

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Abstract

A multi-bit continuous-time sigma-delta analog-to-digital converter (ADC) has an input stage which receives an analog input signal current. A multi-bit feedback current digital-to-analog converter (IDAC) generates a multi-level feedback current depending on a feedback signal. An integrator integrates a sum of the generated current and input signal current on a continuous-time basis. The IDAC has a first output branch including a first biasing current source and a second output branch including a second biasing current source. The biasing current sources supply a bias current to a respective branch of the IDAC to bias the input stage in a mid-scale condition. The biasing current sources are connected to the branches via chopping switches which connect the biasing current sources to the branches in a first configuration and a second, reversed, configuration. The integrator amplifier can also be chopper-stabilized, although preferably only the first stage is chopper-stabilized.

Description

technical field [0001] The present invention relates to sigma-delta analog-to-digital converters. Background technique [0002] The sigma-delta (ΣΔ) structure has become the most common structure for implementing high-precision analog-to-digital converters (ADCs). Figure 1 illustrates the general structure used in a sigma-delta analog-to-digital converter (ADC). The integrator stages 15, 16, 17 depicted in Figure 1 may use a continuous time (C / T or CT) digital to analog converter (DAC) or a discrete time (D / T or DT) DAC. The continuous-time scheme incorporates a current DAC (IDAC) into the feedback path, while the discrete-time scheme incorporates a switched capacitor (S / C) DAC into the feedback path. [0003] In recent years, continuous-time sigma-delta ADCs have attracted much attention in applications requiring signal bandwidths of several MHz. Continuous time ADCs are preferred over switched capacitor ADCs due to their lower power requirements. Other advantages inclu...

Claims

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Application Information

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IPC IPC(8): H03M3/04
CPCH03M3/454H03M3/34H03M3/424
Inventor 保罗・约翰・默洛玛丽亚・戴・莫尔・查马罗・马丁科林・G・莱登迈克・多米尼克・基恩罗伯特・W・亚当斯理查德・托马斯・欧布里安帕斯卡尔・托马斯・米诺格汉斯・约翰・奥洛夫・蒙松
Owner ANALOG DEVICES INC
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