Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Method and system for testing chip

A chip to be tested, chip technology, applied in the field of testing, can solve problems such as difficult comparison

Inactive Publication Date: 2008-09-17
GUANGDONG BOGUAN TECH
View PDF3 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, it is very difficult to compare the results processed by the chip under test 101 and Cmodule

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Method and system for testing chip
  • Method and system for testing chip
  • Method and system for testing chip

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0051] Firstly, the general inventive idea of ​​a chip testing system of the present invention is introduced.

[0052] like figure 2 As shown, a system of a test chip of the present invention includes a PC 201, an interface module 202, a processor 1203, a memory 204, a network interface 205, a bus 206, a programmable logic unit 207, a chip to be tested 208, a processor 2 209 and a display Module 210.

[0053] PC201 sends a control instruction to processor 1203 through interface module 202, processor 1203 reads the input data on the memory 204 through bus 206 according to the control instruction, and processor 1203 sends the input data to programmable logic unit through bus 206 207, and send a control instruction to the programmable logic unit 207, the programmable logic unit 207 simulates the output signal of the sensor according to the control instruction, and sends the output signal and input data to the chip 208 under test. PC201 sends a control instruction to processor ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

This invention discloses one test chip method, which comprises the following steps: a, setting programmable logic unit with analogue sensor output signals; b, programmable logic unit receiving input data and analogue output signal of sensor and the unit inputs the signals to the chip tested; c, receiving input data by use of output signal for data process. This invention compares the results of chips and software evaluation tool and also compares the chip and input data to observe chip computation formula effect.

Description

technical field [0001] The invention relates to a test technology, in particular to a method and system for testing a chip. Background technique [0002] In the process of chip development and manufacturing, the process of testing the chip must be carried out. like figure 1 Shown is a schematic diagram of the composition and structure of the system that needs to be built for the prior art test chip, which includes: [0003] Sensor 102: used to collect input data that needs to be processed and output the output as the input of the chip to be tested. [0004] The chip under test 101 is used to process the output of the sensor 102 and send the processing result to the display 103 . Different chips have different processing functions. For example, the image processing chip in the multimedia processing chip has the functions of image gain control, image format conversion, image scaling, color adjustment and gamma correction; the sound processing chip has the function of sound ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): G06F11/267
Inventor 黄鑫游明琦
Owner GUANGDONG BOGUAN TECH
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com