Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Single datapath floating point implementation of RCP, SQRT, EXP and LOG functions and a low latency RCP based on the same techniques

a floating point, single datapath technology, applied in the field of computer systems, can solve problems such as large gate counts

Inactive Publication Date: 2013-04-11
VIVANTE CORPORATION
View PDF13 Cites 6 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The present invention provides methods and apparatus for implementing various mathematical functions with unified hardware circuitry and data look up table with less than 1000 entries. The invention can be implemented in numerous ways including as a method, a system, or a device. The technical effects of the invention include improved performance, efficiency, and speed in performing desired mathematical functions. The invention also provides pre-processing and post-processing to convert numerical data to the appropriate format for the chosen function.

Problems solved by technology

The hardware implementation of such large data look up tables results in large gate counts proportional to the size of the data look up tables.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Single datapath floating point implementation of RCP, SQRT, EXP and LOG functions and a low latency RCP based on the same techniques
  • Single datapath floating point implementation of RCP, SQRT, EXP and LOG functions and a low latency RCP based on the same techniques
  • Single datapath floating point implementation of RCP, SQRT, EXP and LOG functions and a low latency RCP based on the same techniques

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0022]FIG. 1 is a block diagram illustrating a 6 stage unified hardware pipeline according to an embodiment of the present invention. Here, block 101, block 103, block 105, block 107, block 109, block 111, and block 113 are the register stages of the pipeline. Block 102 is a floating point to fixed point converter. Block 112 is a fixed point to floating point converter. In an example, block 112 may be configured to be bypassing circuit according to an opcode (i.e., a configuration instruction, a micro-code, or the like) for implementing an EXP function. In another example block 102 may be configured to be bypassing circuit according to another opcode (i.e., a configuration instruction, a micro-code, or the like) for implementing an LOG function. In still other examples, both block 102 and block 112 may be configured to be bypassing circuits according to yet another opcode (i.e., a configuration instruction, a micro-code, or the like) in implementing RCP or SQRT functions. In some ex...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

Methods and apparatus is provided for computing mathematical functions comprising a single pipeline for performing a polynomial approximation (e.g. a quadratic polynomial approximation, or the like); and one or more data tables corresponding to at least one of the RCP, SQRT, EXP or LOG functions operable to be coupled to the single pipeline according to one or more opcodes; wherein the single pipeline is operable for computing at least one of RCP, SQRT, EXP or LOG functions according to the one or more opcodes.

Description

BACKGROUND INFORMATIONRelated Applications[0001]1. Field of the Invention[0002]The invention related generally to the field of computer systems and more particularly to computational functions for graphics processor chips.[0003]2. Description of Related Art[0004]Graphics processor chips traditionally employ various mathematical functions implemented in hardware for fast drawing and rendering speed. Some examples of these mathematical functions include reciprocal function (“RCP”), reciprocal square root function (“SQRT”), exponential function (“EXP”) and logarithmic function (“LOG”). These mathematical functions are implemented in prior art as separate circuitry blocks with different algorithms.[0005]For example, in a three cycle RCP implementation in the prior art, a floating point number x may be represented as a concatenation of a most significant bits (“MSB”) portion x0 and a least significant bits (“LSB”) portion x1 where x1=x−x0. The main calculation for reciprocal of x is in t...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(United States)
IPC IPC(8): G06F7/60
CPCG06F1/0356G06F7/5525G06F7/556G06F7/60G06F2101/10G06F2101/12G06F2101/08G06F17/10
Inventor CAI, MIKE M.ZHONG, LEFAN
Owner VIVANTE CORPORATION
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products