Efficient model order reduction via multi-point moment matching

Abstract

A method for mapping moments in a reduced order system of approximation order q for use in simulating a circuit or system having n state variables at n nodes, the circuit or system having I inputs. The method includes calculating only q+I moments, where q is the approximation order and I is the number of inputs of the circuit or system being simulated, sorting the state variables at the n nodes, selecting q nodes of the n nodes, and calculating the dominate poles and zeros using a multi-point moment matching algorithm to simultaneously match q+I moments at the selected q nodes of the circuit or system. In one embodiment, the method includes using extra dummy inputs such that the total number of inputs equals I, such that K*I>q where K is a constant having a value in the range of about 4 to 8.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS [0001] This application is a division of application Ser. No. 10 / 143,276, filed on May 9, 2002, now U.S. Pat. No. ______, which claims priority of provisional application Ser. No. 60 / 290,465, filed on May 11, 2001.FIELD OF THE INVENTION [0002] This invention relates to the design of microelectronic circuits and systems, and more particularly, to simulators for evaluating the performance of microelectronic circuits and systems prior to fabrication. BACKGROUND OF THE INVENTION [0003] In the process of designing circuits, particularly large scale integrated circuits, it is normal practice to mathematically model the electrical circuits. Many circuit simulators have been developed to mathematically model the circuits. Particularly, the outputs of the circuit are modeled as a function of the inputs to the circuit. The mathematical model is used to determine various response characteristics of the circuit. [0004] Circuit simulation has long been an ...

AI Technical Summary

Benefits of technology

"The present invention provides a method and apparatus for simulating linear and nonlinear circuits using a multi-point moment matching technique called MMM. This technique reduces the number of moments required to achieve a specific accuracy, resulting in improved computational efficiency and numerical stability. The MMM technique also allows for parallel processing and is suitable for very large scale integration. The invention also includes an interconnect evaluator for simulating interconnects and a nonlinear circuit simulator for evaluating and optimizing circuit designs. Overall, the MMM technique provides a more efficient and accurate way to simulate complex circuits."

Problems solved by technology

AWE has been referred to above as a Single-Moment Matching (SMM) method of circuit approximation because it looks at each node in isolation of other nodes an approach that creates inefficiencies in terms of processing time and numerical accuracy.

Finally, MMM is highly suitable for parallel processing techniques especially for higher order approximations while using SMM requires calculating the moments sequentially and SMM cannot be adapted to parallel processing techniques.

AWE, while fast, does not allow for parallel processing, which is important as the number of circuit inputs increase.

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