Floating-point complex multiplier

A technology of floating-point complex numbers and multipliers, applied in instruments, machine execution devices, electrical digital data processing, etc., can solve the problems of poor flexibility, high price, large volume and power consumption, etc., to improve data processing speed, volume power The effect of low power consumption and high reliability

Inactive Publication Date: 2007-07-11
WUHAN UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

The integrated circuit construction method has the disadvantages of complex circuit, large volume and power consumption, high price, and poor flexibility. However, the software method has slow operation speed and cannot meet the requirements of modern radar real-time pulse compression technology.

Method used

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Embodiment Construction

[0022] The embodiment of the floating-point complex multiplier of the present invention includes a data interface, a floating-point addition unit, a floating-point subtraction unit, and four floating-point multiplication units.

[0023] As shown in Figure 1, the data interface includes: the real part (X 1 , Y 1 ) and the imaginary part (X Q , Y Q ), the real part (Z) of the result complex number (Z) 1 ) and the imaginary part (Z Q ) Two output interfaces; the input and output data format conforms to the 32-bit single-precision data format of the IEEE-754 standard.

[0024] As shown in Figure 2, the embodiment of the floating-point complex multiplier of the present invention adopts a two-stage pipeline structure, and consists of four floating-point multiplication float_mul modules, one floating-point addition float_add module and one floating-point subtraction float_sub module. The four floating-point multiply units are:

[0025] Used to combine the real part of two compl...

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Abstract

The floating point complex multiplier comprises a data interface, a floating addition unit, a floating deduction unit and four floating point multiplication unit. The invented floating point complex multiplier integrates high frequency land wave radar overall digital radar receiver, realizing the floating point complex multiplication of the timely digital pulse compression, improving the data processing speed and precision. It is high in reliability, good universality, small in size and low in cost.

Description

technical field [0001] The invention relates to the technical field of high-frequency ground-wave marine radar environment monitoring, in particular to a digital pulse compression system in high-frequency ground-wave marine radar environmental monitoring equipment, in particular to a floating-point complex multiplier used in the digital pulse compression system. Background technique [0002] In modern radar design, pulse compression technology is widely used to solve the contradiction between ranging accuracy, velocity measuring accuracy and detection distance. With the rapid development of digital technology and large-scale integrated circuit technology, digital pulse compression technology has gradually replaced the early analog pulse compression technology due to its advantages of stable performance, strong anti-interference ability, flexible control mode and smaller hardware system. It has become the development trend of modern radar pulse compression system. [0003] E...

Claims

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Application Information

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IPC IPC(8): G06F7/57G06F9/38G01S7/295
Inventor 陈泽宗何亮柯亨玉
Owner WUHAN UNIV
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