Method for fabricating grid dielectric layer, and semiconductor components

Abstract

The method for manufacturing grating dielectric layer includes steps: first, forming a well area on substrate; next, carrying out a cleaning procedure for the substrate; then, carrying out a pre annealing process for the substrate; finally, forming a layer of grating dielectric layer on the substrate. The invention raises current in open state of semiconductor element.

Description

technical field [0001] The invention relates to a gate dielectric layer and a manufacturing method of a semiconductor element, in particular to a gate dielectric layer and a semiconductor element manufacturing method capable of improving the operation performance of the semiconductor element. Background technique [0002] In the current prior art, the method of manufacturing the gate dielectric layer of the metal oxide semiconductor device first forms a well region in a substrate by ion implantation. Next, a rapid thermal annealing process is performed on the substrate to compensate for lattice defects generated during ion implantation. Then, a cleaning process is performed, and a gate dielectric layer is formed on the substrate. [0003] However, the rapid thermal annealing process is performed before the cleaning process. If the native oxide layer has not been removed by the cleaning process, the compensation effect on the lattice defects is poor, and the gate dielectric ...

AI Technical Summary

Problems solved by technology

In the case of narrow gate width, the method of fabricating the gate dielectric layer in the prior art cannot increase the on-state current of the semiconductor element

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