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Multi-port memory device with serial input/output interface

A storage device, serial input technology, applied in the field of multi-port storage devices, can solve the problem of difficult to determine whether the fault occurs in the port or in

Inactive Publication Date: 2007-04-11
SK HYNIX INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, it is difficult to determine whether the failure is in the port or in the bank with the DRAM core

Method used

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  • Multi-port memory device with serial input/output interface
  • Multi-port memory device with serial input/output interface
  • Multi-port memory device with serial input/output interface

Examples

Experimental program
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Embodiment Construction

[0040] Hereinafter, a multi-port memory device having a serial input / output (I / O) interface according to an exemplary embodiment of the present invention will be described in detail with reference to the accompanying drawings.

[0041] FIG. 3 is a block diagram of a multi-port memory device according to an embodiment of the present invention. For ease of illustration, a multi-port memory device with two ports and four banks is illustrated.

[0042] The multi-port storage device includes: a plurality of serial I / O disks TX0+, TX0-, TX1+, TX1-, RX0+, RX0-, RX1+ and RX1-, a test mode control panel T, and a test mode determination element 31 , the first switching element 32 and the second switching element 33, the first port PORT0 and the second port PORT1, the first memory bank BANK0 to the fourth memory bank BANK3, and a plurality of global input / output (I / O) data buses PTX0 , PTX1, PRX0, and PRX1.

[0043] A plurality of serial I / O disks support data communication between the...

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Abstract

A multi-port memory device includes a plurality of serial I / O data pads for providing a serial input / output (I / O) data communication; a plurality of ports for performing the serial I / O data communication with external devices through the serial I / O data pads; a plurality of banks for performing a parallel I / O data communication with the ports; a plurality of first data buses for transferring first signals from the ports to the banks; a plurality of second data buses for transferring second signals from the banks to the ports; and a switching unit for connecting the first data buses with the second data buses in response to a control signal.

Description

technical field [0001] The present invention relates to a multi-port memory device, and more specifically, to a serial input / output having a failure of a port for detecting switching parallel / serial data regardless of a failure of a memory bank having a core ( I / O) interface multi-port memory device. Background technique [0002] Typically, multiple memory devices, including random access memory (RAM), have a single port with multiple input / output pin sets. That is, a single port is provided for data exchange between the memory device and an external chipset. The memory device with a single port uses a parallel input / output (I / O) interface to simultaneously transfer multiple bits of data through signal lines connected to a plurality of I / O pins. The memory device exchanges data with external devices through multiple parallel I / O pins. [0003] The I / O interface is an electronic and mechanical mechanism for connecting components with different functions through signal line...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C8/16G11C29/00
Inventor 都昌镐
Owner SK HYNIX INC
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