Data network design verification method and device and verification equipment

A data network and design verification technology, applied in CAD circuit design, special data processing applications, etc., can solve the problems of limited verification scenarios, consistent, insufficient verification, etc., to improve verification efficiency, sufficient data verification, and relieve the pressure Effect

Pending Publication Date: 2021-04-02
HYGON INFORMATION TECH CO LTD
View PDF8 Cites 4 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the verification at the module level cannot be guaranteed to be consistent with the actual chip design scenario, so the verification is not sufficient
For system-level verification, due to the complexity of integrated circuits, there are inevitably problems such as long simulation time and limited verification scenarios.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Data network design verification method and device and verification equipment
  • Data network design verification method and device and verification equipment
  • Data network design verification method and device and verification equipment

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0019] The following will clearly and completely describe the technical solutions in the embodiments of the present disclosure with reference to the drawings in the embodiments of the present disclosure. Apparently, the described embodiments are only some of the embodiments of the present disclosure, not all of them. Based on the embodiments in the present disclosure, all other embodiments obtained by persons of ordinary skill in the art without creative efforts shall fall within the protection scope of the present disclosure.

[0020] "First", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Likewise, "comprising" or "comprises" and similar words mean that the elements or items appearing before the word include the elements or items listed after the word and their equivalents, and do not exclude other elements or items. Words such as "connected" or "connected" a...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention provides a data network design verification method and device and verification equipment. The data network design verification method comprises the following steps: constructing a data transmission layer model for a tested data network function module; arranging a chip design function unit in the data transmission layer model to construct a data bus system; and performing data transmission verification on the data bus system based on the first test sequence. The chip design function unit comprises a clock domain crossing interface module, a voltage domain crossing interface module or a relay unit.

Description

technical field [0001] Embodiments of the present disclosure relate to a data network design verification method, device and verification equipment. Background technique [0002] As the complexity of digital integrated circuit systems continues to increase, the types and numbers of functional modules that make up System-on-a-Chip (SoC) are also increasing, and the data interaction network between modules in the system is also becoming more and more complex. more and more complicated. In order to quickly adapt to different system applications and integration requirements, the network-on-chip data bus with scalable parameters and reconfigurable topology is often used in current large-scale integrated systems. At present, the verification process of the on-chip data network in large-scale integrated circuits usually adopts the method of separately verifying the module level and the system level. However, the module-level verification cannot be guaranteed to be consistent with...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Applications(China)
IPC IPC(8): G06F30/33
CPCG06F30/33
Inventor 王佩高红莉
Owner HYGON INFORMATION TECH CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap