Simulation test system of 1553B bus

Abstract

The invention discloses a simulation test system of a 1553B bus. According to the embodiment of the invention, a test board card is constructed by adopting a system-on-chip (SOC) technology; the constructed test board card truly simulates a full-function simulation test system supporting a 1553B bus in a low-cost mode in a mode of separating interface configuration software borne by an upper computer from real-time embedded running software in an SOC of the test board card. Therefore, according to the embodiment of the invention, the simulation test of the 1553B bus is realized in a full-function manner.

Description

technical field [0001] The invention relates to the technical field of computers, in particular to a simulation test system of a 1553B bus. Background technique [0002] The 1553B bus is an information transmission bus standard specially formulated for aircraft equipment. The 1553 bus has the advantages of good real-time performance, complete data transmission and high bus efficiency, and is suitable for distributed systems with centralized control. Therefore, its application in aircraft communication Among them, there are unique features such as data transmission between subsystems, relatively independent work, easy modification and anti-interference. Among them, the MIL-STD-1553B bus is a kind of 1553B bus (hereinafter referred to as 1553B bus). It is an aircraft internal time division command / response multiplexed data bus. A 1553B bus system includes a bus controller (BC), a bus monitor (BM) and 1 to 31 remote terminals (RT) and other terminal equipment. Such as figur...

AI Technical Summary

Problems solved by technology

[0005] It can be seen that in order to complete the test of the 1553B bus, the simulation test system needs to have very high real-time processing capabilities and message response capabilities, which are better than those of the 1553B The equipment in the system of bus, but, existing emulation test system has two shortcoming: 1) real-time performance is not high

Among them, although the 1553B bus only has a rate of 1 megabit per second (Mbps), frequent message interruptions may occur for BC. Real-time processing requires at least 0.1 millisecond (ms) level real-time processing capability

In the case of non-periodic messages, it may also require more precise control of the message interval, which puts forward high requirements on the test board; for RT, the maximum message response time is generally limited to within a dozen μs, while RT The update of the sub-address message also has high real-time requirements for the test board; 2">The simulation test system in Figure 2 adopts the functional structure of the test board + upper computer, and the message processing is realized in the driver of the upper computer, while the operating system under the upper computer (computer) architecture It is an operating system with low real-time performance. The time precision of its message processing is generally at the ms level, and it is unstable. When the thread load of the upper computer operating system is relatively heavy, the real-time precision will deteriorate.

2) The simulation is not realistic enough

Figure 2 shows the simulation test system because of cost reduction and For the purpose of hardware upward compatibility, etc., when realizing one BC, one BM and multiple RTs, it is realized by software + logic simulation. The Manchester codec function and memory are all realized in a shared way, which is very different from the actual system. Large differences lead to incomplete simulation functions, thus affecting the test coverage of the 1553B bus. In the case of insufficient design considerations, there may be unknown vulnerabilities

[0006] Further, Figure 1 is a single-function simulation test board, which can only realize the simulation of 1 to 2 BCs, or RT, or BM at the time of construction, then For the 1553B bus, when implementing the simulation test, multiple single-function simulation test boards are required to test the 1553B bus, and multiple host computers are required to configure multiple single-function simulation test boards, which brings great high hardware cost

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