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Data random writing method and device of DRAM-Less solid state disk and DRAM-Less solid state disk

A solid-state hard disk, random write technology, applied in the input/output process of data processing, electrical digital data processing, input/output to record carriers, etc., can solve the problem of low random write performance, reduce read and write operations, The effect of improving random write performance and write speed

Active Publication Date: 2019-12-03
SHENZHEN DAPU MICROELECTRONICS CO LTD
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  • Claims
  • Application Information

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Problems solved by technology

[0005] The embodiment of the present invention aims to provide a method and device for randomly writing data into a DRAM-Less solid-state hard disk, and a DRAM-Less solid-state hard disk, which solves the current technical problem of low random writing performance and can effectively reduce Read and write operations on flash memory, improving the random write performance and write speed of DRAM-Less SSDs

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  • Data random writing method and device of DRAM-Less solid state disk and DRAM-Less solid state disk
  • Data random writing method and device of DRAM-Less solid state disk and DRAM-Less solid state disk
  • Data random writing method and device of DRAM-Less solid state disk and DRAM-Less solid state disk

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Embodiment Construction

[0074] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments It is a part of embodiments of the present invention, but not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0075] In addition, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not constitute a conflict with each other. Currently, Solid State Drives (SSDs) equipped with TLC flash memory (Triple Level Cell) generally use the SLC Cache solution to im...

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Abstract

The embodiment of the invention relates to the field of solid state disk application, and discloses a random data writing method and device of a DRAM-Less solid state disk and the DRAM-Less solid state disk. The data random writing method of the DRAM-Less solid state disk comprises the following steps: configuring at least one SLC physical block for a group, and establishing a binding relationshipbetween each SLC physical block and a non-SLC physical block in the group; and receiving data sent by a Host end through the SLC physical block, and when the memory of the SLC physical block is full,copying data of all physical pages of the SLC physical block to a bound non-SLC physical block according to the binding relationship. By means of the mode, read-write operation on the flash memory can be effectively reduced in a random write scene, and the random write performance and the write speed of the DRAM-Less solid state disk are improved.

Description

technical field [0001] The invention relates to the application field of solid-state hard drives, in particular to a method and device for randomly writing data into a DRAM-Less solid-state hard drive and a DRAM-Less solid-state hard drive. Background technique [0002] Solid State Drives (SSD) are hard disks made of solid-state electronic storage chip arrays. Solid State Drives include control units and storage units (FLASH memory chips or DRAM memory chips). At present, competition in the field of consumer-grade SSDs is increasing Intensified, low-cost SSD can take the initiative in the market, and the cost of flash memory and DRAM in an SSD material is relatively high, so in order to reduce costs, TLC (Triple Level Cell) flash memory plus DRAM-Less main control is widely used. [0003] However, due to the lack of Dynamic Random Access Memory (Dynamic Random Access Memory, DRAM), the mapping table in the flash translation layer (Flash translation layer, FTL) can only be s...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F3/06
CPCG06F3/061G06F3/0611G06F3/0679Y02D10/00
Inventor 张吉兴李文江武艺杨亚飞
Owner SHENZHEN DAPU MICROELECTRONICS CO LTD
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