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Design method of simulated neural network chip and simulated neural network chip

A design method and neural network technology, applied in the field of analog computing, to achieve the effect of low power consumption and widening the scope of application

Inactive Publication Date: 2019-11-15
深圳小墨智能科技有限公司
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  • Abstract
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Problems solved by technology

[0005] In view of the above-mentioned deficiencies in the prior art, the purpose of the present invention is to provide a design method of an analog neural network chip and an analog neural network chip, aiming at solving how to improve the accuracy of the analog neural network chip in the prior art, and realize high-speed, high-precision and the problem of low-power analog neural network chips

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  • Design method of simulated neural network chip and simulated neural network chip
  • Design method of simulated neural network chip and simulated neural network chip
  • Design method of simulated neural network chip and simulated neural network chip

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[0040] In order to make the object, technical solution and effect of the present invention more clear and definite, the present invention will be further described in detail below. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention. Embodiments of the present invention will be described below in conjunction with the accompanying drawings.

[0041] see figure 1 , figure 1 It is a flowchart of a preferred embodiment of the method for designing a simulated neural network chip provided by the present invention. like figure 1 As shown, it includes the following steps:

[0042] S100, setting the simulated neural network architecture and establishing the same digital neural network model as the simulated neural network architecture;

[0043] S200. Design and manufacture a simulated neural network circuit according to the simulated neural network architecture;

[0044] S300. Trai...

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Abstract

The invention discloses a design method of a simulated neural network chip and the simulated neural network chip. The method comprises the following steps: setting a simulated neural network architecture and establishing a digital neural network model which is the same as the simulated neural network architecture; designing and manufacturing a simulated neural network circuit according to the simulated neural network architecture; training the digital neural network model, and performing parameter cutting on the digital neural network model according to the target precision of a simulation neural network; and inputting the clipped neural network parameters into the simulated neural network circuit and operating to obtain a simulated neural network chip with target precision. According to the embodiment of the invention, the simulation neural network architecture is designed and the same digital neural network model is established, and the digital neural network is trained to obtain neural network parameters meeting precision requirements, the neural network parameters are imported into the analog neural network chip and operating to obtain the analog neural network chip with targetprecision, thereby realizing the neural network chip with high precision, high speed and low power consumption.

Description

technical field [0001] The invention relates to the technical field of analog computing, in particular to a design method of an analog neural network chip and an analog neural network chip. Background technique [0002] At present, digital neural networks have been widely used in various fields, including face recognition, speech recognition and so on. Large neural networks have high computational requirements. The computing power of digital chips is generally measured in "trillions of operations per second" (TOPS). Currently, digital chips or chip clusters with 100TOPS computing power are very expensive, and require at least tens of watts of power consumption. Due to the characteristics of digital computers and digital circuits, operations are completed through instruction sets, and calculation results generally need to be above the millisecond (mS) level, and cannot reach the microsecond or nanosecond level. [0003] Due to the rise of digital technology, people have no...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06N3/04G06N3/10
CPCG06N3/10G06N3/045
Inventor 叶军
Owner 深圳小墨智能科技有限公司
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