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A descriptor-based PCIE bus DMA controller and a data transmission control method

A DMA controller, data transmission control technology, applied in the direction of electrical digital data processing, instruments, etc., can solve the problems that do not involve multi-channel transmission, can not meet, do not consider the different priorities of data of multiple channels of DMA, and achieve improvement The effect of improving transmission efficiency, increasing transmission size, and reducing CPU burden

Active Publication Date: 2019-03-15
XIAN MICROELECTRONICS TECH INST
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Problems solved by technology

[0004] It can be seen from the above that the current PCIE bus DMA controller and related patent achievements do not involve multi-channel transmission or do not consider automatic processing of data of multiple DMA channels according to different priorities in multi-channel DMA transmission, which cannot meet the needs of multiple DMA channels. Application system requirements for simultaneous transmission of multiple data with different priorities

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  • A descriptor-based PCIE bus DMA controller and a data transmission control method
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  • A descriptor-based PCIE bus DMA controller and a data transmission control method

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[0053] According to content of the present invention, design detailed implementation scheme, DMA controller structure is as figure 2 shown. The DMA controller of the present invention needs to perform an initialization operation before use, and the initialization operation includes two parts:

[0054] (1) Initialization of the host memory. The host memory needs to open up a descriptor table space and a data cache space. Each DMA channel has two descriptor tables, which are the upload data descriptor table and the send data descriptor table. Each descriptor table contains multiple descriptors with consecutive addresses, and each descriptor points to a buffer in the unique host system memory.

[0055] Figure 4 The DMA upload data cache descriptor, the upload descriptor (TDES) is used for data upload data transmission from the PCIE node device to the host memory. image 3 The data cache descriptor is issued for DMA, and the delivery descriptor (RDES) is used for data transmi...

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Abstract

The invention provides a descriptor-based PCIE bus DMA controller and a data transmission control method, includes TLP sending engine, TLP receiving engine, interface access control module, DMA transfer control module, descriptor access control module, multi-DMA channel control module, control status register and DMA channel buffer. The DMA transfer process of the DMA controller designed by the invention is completely controlled by a descriptor, and the data bandwidth and the transfer efficiency are improved. DMA data transmission can configure multiple DMA channel, and that priority of each DMA channel, the transmission triggering threshold and the timeout time are programmable, so that the data transmission can be carry out according to the high and low priority, and the real-time data transmission of the specific channel can be guaranteed; The upload / download data buffers of all DMA channels can be dynamically managed to achieve multi-channel DMA multiplexing and ensure the efficiency of DMA transfer bandwidth.

Description

technical field [0001] The invention belongs to the field of data transmission control, in particular to a descriptor-based PCIE bus DMA controller and a data transmission control method. Background technique [0002] PCIE bus technology is the third-generation I / O interconnection bus. PCIE bus is a cost-effective high-bandwidth transmission solution in desktop computers, communication platforms, servers, workstations, mobile communications, and embedded devices. In recent years, PCIE bus technology has gained more and more applications in many high-performance integrated electronic platforms and systems. Using DMA (Direct Memory Access, direct memory access) data transmission is the most commonly used technology to utilize the high bandwidth and high performance of PCIE bus One of the means. Many PCIE bus products on the market have integrated DMA controllers, but they are all oriented to generalization and traditional application scenarios. In some application scenarios t...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/12G06F13/42
CPCG06F13/124G06F13/4282
Inventor 唐金锋刘扬哈云雪徐丹妮
Owner XIAN MICROELECTRONICS TECH INST
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