A resistance-capacitance hybrid digital-to-analog converter

Abstract

A resistance-capacitance hybrid digital-to-analog converter belongs to the technical field of analog integrated circuits. Including resistor array unit, capacitor array unit and redundant capacitor; the resistor array unit uses R2R resistor array for the 1st to nth bits corresponding to the input, and the capacitor array unit uses a binary weight capacitor array corresponding to the n+1th to the input n+m bits, in which the capacitance value corresponding to the highest bit, that is, the n+m bit, is 2 m‑1 C u The capacitor is split into 2 capacitors with a value of 2 m‑2 C u The capacitance of the capacitor, the capacitance value corresponding to the second high bit of the input is 2 m‑2 C u The capacitors constitute a 3-bit temperature code, which reduces the influence of capacitance mismatch on the linearity of the digital-to-analog converter. The present invention can realize the compromise of linearity, area and power consumption by controlling the combination ratio of the resistance array unit and the capacitance array unit, so that the present invention can be applied to SAR ADCs with different indexes.

Description

technical field [0001] The invention belongs to the technical field of analog integrated circuits, and in particular relates to a resistance-capacitance hybrid digital-to-analog converter (DAC) array, which can be applied to a successive approximation analog-to-digital converter (SAR ADC). Background technique [0002] In analog integrated circuit technology, the successive approximation analog-to-digital converter (SAR ADC) has always been a research hotspot in the field of analog-to-digital converters (ADC) at home and abroad, because of its low power consumption, small area, and medium to high resolution. , so that SAR ADC has been widely used, for example, in the fields of industrial control, automotive electronics and consumer electronics. [0003] The DAC digital-to-analog conversion module of the successive approximation analog-to-digital converter is one of the key modules, and its linearity directly affects the linearity of the SAR ADC. There are currently four cla...

AI Technical Summary

Problems solved by technology

When the binary weight capacitor array is used, the SAR ADC does not need an additional sample and hold circuit, and the control is simple, and the power consumption is small, but there are two disadvantages: 1. The matching accuracy of the capacitor array and the matching error of the capacitor array will introduce nonlinear errors; 2. As the number of digits of the approaching ADC increases, the capacitance value increases exponentially and takes up a larger chip area

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