A processing method and device for a memory in a device based on a SW architecture

Abstract

The embodiment of the invention provides a processing method and device for a memory in a device based on a SW architecture. The method comprises the following steps: in the process of initializing alarge-page memory, obtaining the memory usage amount required by the device for receiving and sending messages, wherein the memory usage amount is the sum of a packet cache PKB memory usage amount anda direct memory access DMA memory usage amount; at each time aft that large page memory chunk is merged, cutting the large page memory chunk according to the memory usage amount and the preset memorylimit address to obtain the target memory chunk; filtering in a memory to be allocated of the device according to a PKB identifier or a DMA identifier to obtain a target memory block; allocating thetarget memory block to the PKB memory and the DMA memory for use by the PKB memory and the DMA memory. The device performs the method described above. The method and the device provided by the embodiment of the invention can avoid the abnormal condition that the message cannot be received and transmitted by the equipment based on the SW architecture.

Description

technical field [0001] The embodiment of the present invention relates to the technical field of hardware device failure processing, and in particular to a method and device for processing memory in a device based on the Shenwei architecture. Background technique [0002] During the initialization process of Shenwei architecture-based devices (including hardware devices such as firewalls), the huge page memory pages will be sorted according to the physical address from small to large, and the large page memory pages with continuous physical addresses belonging to the same physical node will be merged. Thereby merging into a large memory block of large pages, which is managed by a memory descriptor table (rte_memseg), the physical addresses of different large memory blocks of large pages may be separated and discontinuous. [0003] In the prior art, when the above-mentioned large page memory is initialized, as long as the large page memory pages with continuous physical addre...

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Problems solved by technology

[0003] In the prior art, when the above-mentioned large page memory is initialized, as long as the large page memory pages with continuous physical addresses are connected and integrated into a large large page memory block, no interface related to memory address limitation is provided. Similarly, the packet buffer (hereinafter referred to as "packetbuffer" PKB") and memory allocation for sending and receiving messages by DMA do not provide memory address limit related interfaces, so the memory allocated for PKB and DMA sending and receiving messages cannot be guaranteed to be within the preset memory limit address, if it is not in the preset memory Within the restricted address, it will cause the device to have an abnormal situation of sending and receiving messages. For example, when the input / output memory management unit (input / output memory management unit hereinafter referred to as "IOMMU") mode of the device is turned on, the network card will not be able to send and receive messages normally. Wen's situation appears

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