Data control flow chart generation method and system and integrated circuit design method

Abstract

The invention discloses a data control flow chart generation method and system and an integrated circuit design method. According to the data control flow chart generation method, a to-be-optimized data control flow chart is generated through algorithm data flow information and algorithm control flow information obtained through analysis of a data control flow chart described in a computer language, it is possible for a computer to realize mapping from the data control flow chart described in the computer language to the to-be-optimized data control flow chart, that is, it is possible to automatically realize mapping from the data control flow chart described in the computer language to the to-be-optimized data control flow chart, and therefore the purposes of lowering the generation difficulty of the data control flow chart and improving the generation efficiency of the data control flow chart are achieved. Besides, after the to-be-optimized data control flow chart is acquired, the to-be-optimized data control flow chart is optimized according to a generated power consumption information base in the computer language, so that the low-power-consumption requirement of the obtained data control flow chart is met.

Description

technical field [0001] The present application relates to the technical field of integrated circuit design, and more specifically, to a method and system for generating a data control flow graph, and an integrated circuit design method. Background technique [0002] As the integrated circuit manufacturing process enters the stage below 40nm, the power consumption factor of integrated circuit design has gradually become the main factor of design considerations, especially for the circuit design of mobile handheld devices and wearable devices. [0003] At present, the mature IC low-power technologies include: system-level technologies include: sleep mode, dynamic power management, dynamic voltage (or frequency) adjustment, low-power compilation, etc.; architecture-level technologies include: asynchronous circuits, algorithm optimization, reasonable Software and hardware division, etc.; RTL-level technology includes: clock gating, operand isolation, memory access control, pre-c...

AI Technical Summary

Problems solved by technology

In traditional integrated circuit design, it is necessary to manually map the algorithm described in a high-level language (such as C language) into an algorithm data control flow graph, and then complete the hardware component design through an integrated circuit hardware description language (such as Verilog language). The first step is to The longest stage in the IC design process and relies heavily on the engineer's design experience

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