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Method for achieving FPGA software simulation task scheduling through application time shaft configuration

A configuration method and software simulation technology, applied in software testing/debugging, instrumentation, electrical and digital data processing, etc., can solve the problem of difficult to reflect the corresponding relationship between test cases and test codes, affecting test progress and quality, and unable to clearly display test case timing. performance and other issues, to achieve the effect of improving system configuration capabilities and improving batch processing capabilities

Active Publication Date: 2018-06-12
北京京航计算通讯研究所
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Problems solved by technology

[0004] The line-by-line coding implementation of the above test cases is difficult to reflect the corresponding relationship between all test cases and test codes, and it is difficult to implement effective control over the execution of a single test case or multiple test cases
It is also impossible to clearly display the timing implementation of test cases, which not only affects the test progress and quality, but also makes it difficult to realize batch execution of FPGA simulation tests, which brings problems to the development of FPGA simulation test technology and the improvement of the quality level of people.

Method used

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  • Method for achieving FPGA software simulation task scheduling through application time shaft configuration
  • Method for achieving FPGA software simulation task scheduling through application time shaft configuration
  • Method for achieving FPGA software simulation task scheduling through application time shaft configuration

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Embodiment 1

[0050] In this embodiment, the specific scheme is as follows:

[0051] 1) This method is applied to a simulation support platform of FPGA. In this simulation platform, analyze the FPGA and its peripheral system architecture, and determine the tested FPGA and its peripheral interface devices.

[0052] 2) Analyze the test case, determine the input and output objects of the relevant data of the test case, the characteristics of the output and output data, and the characteristics of the timing relationship of the test case.

[0053] 3) Establish a coordinate axis, the abscissa of the coordinate axis is the tested FPGA and its peripheral interface devices, and the ordinate is time. Each device on the abscissa corresponds to a vertical axis.

[0054] 4) Set the time axis where the tested FPGA and peripheral interface devices are located, and set the timing and data task points according to the requirements of parallel timing and serial timing. Such as Figure 10 shown.

[0055]...

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Abstract

The invention belongs to the technical field of FPGA software simulation testing and particularly relates to a method for achieving FPGA software simulation task scheduling through application time shaft configuration. According to the method, FPGA software test cases are implemented through task scheduling, and task scheduling is configured through task points. The task points are arranged on a coordinate axis, and the coordinate axis is a two-dimensional coordinate axis composed of a transverse device and longitudinal time; each target in the coordinate axis configures the task points according to time sequence requirements, so that systematic and sequential operation of the test cases is achieved, then the system configuration capability of FPGA software simulation task scheduling is improved, and the test case batch processing capability is improved.

Description

technical field [0001] The invention belongs to the technical field of FPGA software simulation testing, and in particular relates to a method for implementing FPGA software simulation task scheduling by using a time axis configuration mode. Background technique [0002] At present, when carrying out the FPGA software simulation test, the tester first writes the test description document, which contains all the test cases of the FPGA software to be tested. Each test case describes the test purpose, test input data, test steps and expected test results. The test case is described as figure 1 shown. [0003] For FPGA software simulation testing, it is necessary to convert the above test cases into a language that can be recognized by the FPGA simulation execution tool so that it can be loaded into the simulation execution tool to perform simulation. At present, the implementation of test cases is in the code editing environment, and it takes a lot of manpower and time to re...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/36
CPCG06F11/3676G06F11/3684G06F11/3688
Inventor 郑金艳张清陈朋安鹏伟刘伟魏伟波孙文靖康建涛高晓琼张依漪孟琪张骢陈盼季微微李昂马培培李志刚王赢超李春静王莹
Owner 北京京航计算通讯研究所
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