Array substrate, manufacturing method thereof, and display device

Abstract

The present invention provides an array substrate, a manufacturing method thereof and a display device. The array substrate includes a base substrate and a spacer layer on the base substrate, a first conductive pattern layer and a second conductive pattern layer. The spacer layer is disposed between the first conductive pattern layer and the second conductive layer; and the projection of the spacer layer on the base substrate covers a projected overlapping area of the first conductive pattern layer and the second conductive pattern layer on the base substrate. The present invention avoids the short circuit between the conductive pattern layers that are easily caused when the hillocks are formed between the first conductive pattern layer and the second conductive pattern layer at the overlapped area and reduces the probability of the occurrence of the line defects so as to improve the display panel yield and to ensure the display of the product.

Description

technical field [0001] The present invention relates to the field of display technology, in particular to an array substrate, a manufacturing method thereof, and a display device. Background technique [0002] In the traditional manufacturing process of the organic light-emitting diode (Organic Light-Emitting Diode, referred to as: OLED) backplane, the thick aluminum process is often used to manufacture the gate lines. [0003] Since the thermal expansion coefficient of aluminum itself is relatively large, hillocks are likely to be formed on aluminum at high temperatures (about 300° C.). In the backplane process, the temperature generated in the production of the insulating layer and the annealing process is much higher than 300°C, and because the thick aluminum process is used to make the grid lines, the probability of hillocks in the backplane process is greatly increased. . Since the distance between the grid line and the data line at the overlapping area where the grid...

AI Technical Summary

Problems solved by technology

Since the distance between the grid line and the data line at the overlapping area where the grid line and the data line are projected on the substrate is small, if a hillock is generated between the grid line and the data line at the overlapping area, then It is easy to cause the gate line and the data line in the overlapping area to be short-circuited, forming a line defect, and the size of the hillock is usually less than 1 micron, which is difficult to observe even under a microscope, making the detection of line defects very difficult

[0004] Therefore, in the prior art, the hillock generated between the gate line and the data line at the overlapping area where the gate line and the data line are projected on the substrate is likely to cause a short circuit between the gate line and the data line at the overlapping area. , forming line defects, leading to a decrease in product yield and affecting the display effect of the product

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