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A Method of Locating Chip Problems Based on Scan Chain

A scanning chain and chip technology, applied in the direction of static memory, instrument, etc., can solve problems such as difficulty in recovery, signal synchronization of flying line quality, etc., and achieve the effect of solving signal synchronization and solving risks

Active Publication Date: 2020-09-01
RAMAXEL TECH SHENZHEN
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  • Abstract
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  • Claims
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AI Technical Summary

Problems solved by technology

[0002] The existing scan chain positioning chip problem method, because the control logic is outside the chip, often requires a large number of wiring in the post-hardware production stage, which brings problems. First, the signal synchronization problem caused by the quality of the flying line
Another problem is that all the scan chain channels are flipped at the same time, which brings the risk of IR drop. Secondly, because all the scan chain channels of the chip shift the content of the chip together, it is difficult to restore to the state before scanning.

Method used

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  • A Method of Locating Chip Problems Based on Scan Chain
  • A Method of Locating Chip Problems Based on Scan Chain
  • A Method of Locating Chip Problems Based on Scan Chain

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Embodiment Construction

[0018] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

[0019] figure 1 It is the logical block diagram of the system after adding DFD. The logical state collection module DFD includes the protocol message input terminal Din and the message output terminal Do. The output ports of each scan chain DFT in the chip are connected to the logical state collection module DFD; the logical state The collection module collects the state of the internal registers of each scan chain according to the messages input by the protocol me...

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Abstract

The invention discloses a method for locating chip problems based on scanning chains. The method is characterized in that a logical state collection module is additionally arranged in a chip; the logical state collection module comprises a protocol message input terminal and a message output terminal; output ports of all the scanning chains in the chip are connected with the logical state collection module; the logical state collection module collects the states of the internal registers of all the scanning chains according to the message input by the protocol message input terminal, and generates a result message based on the states of the internal registers and outputs the same to the chip by means of the message output terminal. By adopting a set of chip embedding logic, the number of pins, interacting with the outside, of the chip, is reduced to two, so that the problem of signal synchronization is solved. The number of the scanning chains shifting at the same time is reduced to one, so that the risk of IR Drop is effectively solved; furthermore, by adopting a way of circular shift, the state of the chip is restored to the state before scanning while the scanning is completed.

Description

technical field [0001] The invention relates to the field of information electronic chip design, in particular to a method for locating chip problems based on scan chains. Background technique [0002] The existing scan chain positioning chip problem method, because the control logic is outside the chip, often requires a large number of wiring in the post-hardware production stage, which brings problems. First, the signal synchronization problem caused by the quality of the flying line. Another problem is that all the scan chain channels are flipped at the same time, which brings the risk of IR drop. Secondly, because all the scan chain channels of the chip shift the content of the chip together, it is difficult to restore to the state before scanning. Contents of the invention [0003] In view of the above defects, the purpose of the present invention is how to quickly locate the internal problems of the chip when the CPU is abnormal, save debugging time, and eliminate ma...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C29/12G11C29/44
CPCG11C29/12G11C29/44G11C2029/1206
Inventor 赵胜平黄运新张鹏
Owner RAMAXEL TECH SHENZHEN
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