Method and device for testing storage
A memory and self-test technology, applied in the field of memory, can solve the problems of rising cost of memory products and high test cost
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Embodiment 1
[0028] refer to figure 2 , shows a flow chart of steps of an embodiment of a method for testing a memory of the present invention, the memory includes a self-test controller, and the self-test controller may be embedded or integrated in the memory, and the method for testing the memory may specifically include the following steps:
[0029] S21. Connect the memory to the first test device, and send an instruction to start the self-test to the memory through the first test device.
[0030] Wherein, the memory may be any memory, including a memory whose stored information will not disappear when the system is turned off or has no power supply, and a memory whose stored information will disappear. Specifically, the memory and the first test device may be connected through a data interface, and the first test device may supply power to the memory. After the memory receives the command to start the self-test, the self-test controller is started.
[0031] Specifically, the command...
Embodiment 2
[0045] refer to image 3 , shows a flow chart of the steps of another method embodiment for testing the memory of the present invention, the memory includes a self-test controller, the self-test controller can be embedded or integrated in the memory, and the information and presets corresponding to each function to be tested The information corresponding to the maximum number of tests is integrated in the startup self-test instruction, and the method for testing the memory may specifically include the following steps:
[0046] S31, setting the information corresponding to each function to be tested and the information corresponding to the preset maximum number of tests in the start self-test instruction.
[0047] Wherein, the memory may be any memory, including a memory whose stored information will not disappear when the system is turned off or has no power supply, and a memory whose stored information will disappear. Specifically, in step S31, information corresponding to e...
Embodiment 3
[0066] refer to Figure 4 , shows a structural block diagram of an embodiment of a device for testing a memory of the present invention, the memory includes a self-test controller, and the self-test controller can be embedded or integrated in the memory, and the device for testing the memory may specifically include the following modules:
[0067] The command sending module 41 is configured to connect the memory with the first test device, and send the start-up self-test command to the memory through the first test device.
[0068] Wherein, the memory may be any memory, including a memory whose stored information will not disappear when the system is turned off or has no power supply, and a memory whose stored information will disappear. Specifically, the memory and the first test device may be connected through a data interface, and the first test device may supply power to the memory. After the memory receives the command to start the self-test, the self-test controller is ...
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