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Aging test device and method of integrated circuit chip on the basis of daughter boards and mother board

A chip aging test, integrated circuit technology, applied in the direction of electronic circuit testing, measuring devices, measuring electricity, etc., can solve the problems of lengthening test cycle, long preparation time, reducing test efficiency, etc., to reduce test cost, reduce test cycle, The effect of improving test efficiency

Pending Publication Date: 2017-05-31
上海鑫匀源科技有限公司
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] However, there are many types of tested chips, and their packaging types and pin arrangements are different. Therefore, different burn-in test boards need to be ordered for different types of tested chips.
At present, the design and manufacture cost of burn-in test board is relatively high, which brings high test cost, and it is difficult to accept products with low unit price and simple test circuit
In addition, the pre-preparation time for custom-made aging test boards is longer, which lengthens the test cycle and reduces test efficiency

Method used

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  • Aging test device and method of integrated circuit chip on the basis of daughter boards and mother board
  • Aging test device and method of integrated circuit chip on the basis of daughter boards and mother board
  • Aging test device and method of integrated circuit chip on the basis of daughter boards and mother board

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Embodiment Construction

[0033] The idea, specific structure and technical effects of the present invention will be further described below in conjunction with the accompanying drawings, so as to fully understand the purpose, features and effects of the present invention.

[0034] like Figure 1 to Figure 8 As shown, a burn-in testing device for integrated circuit chips based on daughter boards includes a general burn-in mother board 10 and multiple burn-in daughter boards 20 .

[0035] The universal burn-in motherboard 10 is provided with a plurality of stations 11 for installing the burn-in sub-board 20, a golden finger interface 12 for connecting with the burn-in test machine, a power supply interface 13 and an LED indicator light. There are a plurality of contact pins 111 arranged in an array; among them, the gold finger 12, the power interface 13 and the LED indicator light are used to realize functions such as the access of the drive module, power supply and work instructions of the aging test m...

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Abstract

The invention relates to an ageing test device and method of an integrated circuit chip on the basis of daughter boards and a mother board. The device comprises a universal ageing mother board and a plurality of ageing daughter boards, wherein the universal ageing mother board is provided with a plurality of stations, and the stations are provided with a plurality of spring needles arranged in an array; the ageing daughter boards can be installed on one station of the universal ageing mother board; the front side of each ageing daughter board is provided with a chip installation part and is integrated with a peripheral application circuit; the back side of each ageing daughter board is provided with a plurality of metal contacts arranged in an array, wherein one part of the plurality of metal contacts is connected with the pin of a chip to be tested, and the other part is connected with the peripheral application circuit; a contact pin on each station is matched and is in contact with each metal contact on the back side of each ageing daughter board so as to connect the ageing daughter boards into the general ageing mother board. The invention also provides the test method. The ageing test device and method can be suitable for various types of integrated circuit chips to carry out ageing experiments and aged performance tests, test cost is effectively saved, and a test period is shortened.

Description

technical field [0001] The invention relates to the technical field of aging testing of integrated circuit products, in particular to an aging testing device and testing method for integrated circuit chips based on a sub-motherboard. Background technique [0002] Before mass production of integrated circuit chips, they generally undergo aging tests (to ensure the service life and reliability of the chips) and performance tests (mass production tests of chip functions and performance). Integrated circuit chips that pass the above two tests can be Defined as good. The traditional burn-in test board is usually a multi-station burn-in PCB board with at least 77 stations. Each station is equipped with a dedicated chip socket, and the pins of the chip to be tested are introduced into the burn-in PCB board. The chip is subjected to high temperature and high pressure charging aging test. [0003] However, there are various types of chips to be tested, and their packaging types and...

Claims

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Application Information

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IPC IPC(8): G01R31/28
CPCG01R31/2863Y02D10/00
Inventor 朱笑鶤余瑶
Owner 上海鑫匀源科技有限公司
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