Trimming and testing circuit for power supply management chip and power supply management chip

A power management chip and circuit technology, applied in electronic circuit testing, measuring electricity, measuring devices, etc., can solve the problems of low actual use value, inability to achieve adjustment, and rising cost, and achieve comprehensive testing functions, convenient modification, cost saving effect

Inactive Publication Date: 2016-11-09
上海宝司芯微电子有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the above-mentioned solutions are generally costly and cannot achieve post-package trimming
In the existing technology, it is also possible to adjust the chip in the finished product stage, but it often brings a substantial increase in cost, and the actual use value is not high
In addition, for some special products, such as devices with only three pins, these solutions are powerless

Method used

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  • Trimming and testing circuit for power supply management chip and power supply management chip
  • Trimming and testing circuit for power supply management chip and power supply management chip
  • Trimming and testing circuit for power supply management chip and power supply management chip

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Embodiment Construction

[0022] The present invention will be further described below in conjunction with accompanying drawing.

[0023] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments It is an embodiment of a part of the present invention, but not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0024] In a specific embodiment of the present invention, as figure 1 As shown, the trimming test circuit of the power management chip includes: a data transmission module, connected to the first pin, using asynchronous logic to transmi...

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PUM

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Abstract

The invention provides a trimming and testing circuit for a power supply management chip and a power supply management chip. The circuit is used for trimming a packaged finished product chip and comprises a data transmission module, a control module and a feedback unit. The data transmission module is connected with a first pin, and transmits a pulse trigger signal input from the first pin by using asynchronous logic. The control module is connected with the data transmission module, receives the pulse trigger signal, and controls the read-write of a fuse wire read-write unit on the power supply management chip. The circuit also comprises the feedback unit connected with the control module. The feedback unit feeds the signal after the circuit is trimmed back to the first pin for outputting the signal. Key indexes of the packaged finished product chip are tested and trimmed through the trimming and testing circuit for the power supply management chip, and the cost is greatly saved.

Description

technical field [0001] The invention relates to the technical field of power management chips, in particular to a trimming and testing circuit of the power management chip and the power management chip. Background technique [0002] At present, many power management chips need to be adjusted to improve the performance of the product and expand the product at a lower cost. The traditional chip trimming method is to add trimming pads on the chip, adjust the performance of the chip during the mid-test stage of the chip, and then package the chip. Since the packaging will have a certain impact on the wafer structure used to manufacture the chip, it is easy to cause deviations between the parameters of the finished chip after packaging and the chip parameters during the mid-test, resulting in a loss of yield. At the same time, the traditional trimming method cannot make further adjustments to the finished chip, so it will cause pressure on production and stocking. [0003] Th...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01R31/28
CPCG01R31/282
Inventor 魏汝新唐沛寅
Owner 上海宝司芯微电子有限公司
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