Method for performing communication among EDMA (enhanced direct memory access) different bandwidth devices in multi-core DSP (digital signal processor)

A technology of inter-device communication and bandwidth, applied in the field of EDMA communication, can solve the problem of mismatch between requests and responses, and achieve the effect of reducing complexity and difficulty in design and implementation

Inactive Publication Date: 2016-08-10
LANGCHAO ELECTRONIC INFORMATION IND CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] Since there are many device request sources, different devices have different operation bit widths, and the request response is returned in the form of broadcast, when the request response is returned out of order, it is easy to cause a mismatch between the request and the response

Method used

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  • Method for performing communication among EDMA (enhanced direct memory access) different bandwidth devices in multi-core DSP (digital signal processor)
  • Method for performing communication among EDMA (enhanced direct memory access) different bandwidth devices in multi-core DSP (digital signal processor)
  • Method for performing communication among EDMA (enhanced direct memory access) different bandwidth devices in multi-core DSP (digital signal processor)

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Experimental program
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Effect test

Embodiment 1

[0052] like figure 1 As shown, a method for communicating between EDMA devices with different bandwidths in a multi-core DSP is characterized in that: each DSP core is allocated an independent processing channel, an EDMA common channel, and each channel can independently process data from other DSP cores and other devices. By adopting synchronous FIFO to realize the read operation information cache mechanism + read operation return data cache processing mechanism, the precise matching between the response return and the request is realized, and data communication between devices with different bit widths is realized.

[0053] In a multi-core DSP, the EDMA controller can access many device spaces, including multiple storage spaces such as memory and peripherals, which involves accurate return of request responses and data interaction between devices with different bit widths;

[0054] The response to the request sent by the bus is returned in the form of broadcast. By adopting ...

Embodiment 2

[0056] On the basis of Embodiment 1, the method described in this embodiment sends a read command through the read operation controller, and updates the relevant parameters of the read operation;

[0057] Every time the read operation controller sends out a read command, the information of the operation is buffered at the same time, including: the data valid bit signal Rd_ValidBytes and the device encoding signal DevNum; the read operation information (read command information buffer) that needs to be buffered is stored in a synchronous FIFO;

[0058] Every time a response is returned, the temporarily stored information is taken out from the FIFO, and the data on the bus is only received when the device information of the returned data is consistent with the temporarily stored device code;

[0059] When the FIFO is read empty, it indicates that the execution of the current read command is completed;

[0060] The data returned by the read command and the buffered read operation i...

Embodiment 3

[0066] like figure 2 As shown, on the basis of Embodiment 2, the function of the read operation controller described in this embodiment is realized by the read operation state machine RdState, which contains four states: IDLE, PRETREA, RDPHASE, WAITEND:

[0067] IDLE: idle state;

[0068] PRETREA: Preprocessing state, as long as Escnt is not 0, you can jump to RDPHASE state smoothly. Judging and updating the parameter configuration of the read operation;

[0069] RDPHASE: Generate a read command, and judge the device address space according to the high 16-bit address of SRC Address;

[0070] WAITEND: Wait for the write operation control to complete all write operations; the end condition is defined as only when the read and write state machines enter IDLE at the same time, the current request is completely processed and the next transmission request can be received.

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Abstract

The invention discloses a method for performing communication among EDMA (enhanced direct memory access) different bandwidth devices in a multi-core DSP (digital signal processor). Each DSP core is provided with an independent processing channel, each channel is independent and can process requests from other DSP cores and other devices, a read operating information cache mechanism and a read operating information return data caching mechanism are realized through synchronous FIFO (first in, first out), accurate matching of return responding and requests is realized, and data communication among different bit width devices is realized. According to the method, read and write operation is controlled by state machines adopting the same working mechanism, and the logic complexity and the design difficulty are effectively reduced.

Description

technical field [0001] The invention relates to the technical field of EDMA communication, in particular to a method for communication between EDMA (Enhanced Direct Memory Access) devices with different bandwidths in a multi-core DSP (Digital Signal Processor). Digital signal processing is the theory and technology of processing signals by means of numerical calculation. Its original name in English is digital signal processing, or DSP for short. Background technique [0002] The EDMA controller is a key component of multi-core DSP controlling data transmission, and the request processing speed and function of EDMA are the key to affecting data transmission. In multi-core DSP, EDMA can accept requests from multiple devices, including requests from each DSP core memory, DDR, EMIF and other devices. [0003] Since there are many device request sources, different devices have different operating bit widths, and request responses are returned in the form of broadcast, when requ...

Claims

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Application Information

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IPC IPC(8): G06F15/173
CPCG06F15/173G06F15/17306G06F15/17325
Inventor 张永照童元满李仁刚
Owner LANGCHAO ELECTRONIC INFORMATION IND CO LTD
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