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Asymmetric multiprocessor communication method and device

A technology of multi-processor and communication method, applied in the field of communication, can solve the problems such as the inability of the processor to process the interrupt signal, the loss of the interrupt signal by the processor, the accumulation and extrusion of multiple interrupt signals, etc.

Active Publication Date: 2018-06-08
SPREADTRUM COMM (SHANGHAI) CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] However, with the above-mentioned AMP system, when the communication between processors is very frequent, some processors with slower processing speed may not be able to process all the interrupt signals sent by Mailbox, causing multiple interrupt signals to accumulate and squeeze, causing the processor to only Discard some of the interrupt signals

Method used

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  • Asymmetric multiprocessor communication method and device

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Embodiment Construction

[0030] In the existing AMP system, when the communication between processors is very frequent, some processors with slower processing speed may not be able to process all the interrupt signals sent by Mailbox, causing multiple interrupt signals to accumulate and squeeze, resulting in processing The device can only lose part of the interrupt signal.

[0031] For example, processor A and processor B send information to processor C at the same time, and processor C receives interrupt signal A corresponding to processor A and interrupt signal B corresponding to processor B sent by Mailbox at the same time. Since the processor C receives the interrupt signal A and the interrupt signal B at the same time, and the processing speed of the processor C is relatively slow, the processor C processes the interrupt signal A while ignoring the interrupt signal B, resulting in the loss of the interrupt signal B.

[0032] In the embodiment of the present invention, when the target processor re...

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Abstract

An asymmetric multiprocessor communication method and device, the method comprising: a target processor receiving an interrupt signal from a Mailbox, the interrupt signal being: when the Mailbox receives information sent to the target processor, The generated signal corresponds to the information one by one; the target processor identifies the source processor that sends information to the target processor according to the received interrupt signal; the target processor sequentially The interrupt signal corresponding to the source processor is processed. By adopting the method and device, the accumulation of interrupt signals can be effectively avoided, and the loss of interrupt signals can be prevented.

Description

technical field [0001] The invention relates to the communication field, in particular to an asymmetric multiprocessor communication method and device. Background technique [0002] Asymmetric multiprocessing (Asymmetric Multi Processing, AMP) is a multi-source processing architecture, in which there are multiple processors, and information is transmitted between each processor through Mailbox. Mailbox is a mailbox processing control unit added inside AMP, which is specialized in sending, distributing and receiving messages between processors. [0003] In the prior art, Mailbox manages and saves communication messages between processors through a dedicated first-in-first-out (FIFO) queue, and each processor has a corresponding FIFO queue to manage and receive information. In Mailbox, there is control logic for distributing and differentiating each processed message. [0004] For example, if processor A sends message 1 to processor B and message 2 to processor C, then mess...

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Application Information

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IPC IPC(8): G06F15/167
Inventor 杨攀
Owner SPREADTRUM COMM (SHANGHAI) CO LTD
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