Time sequence budgeting method capable of considering distance and clock

Abstract

The invention provides a time sequence budgeting method capable of considering a distance and a clock by aiming at the roughness and the boundness of the time sequence budgeting method with a shortest boundary in a hierarchical physical design and the time sequence budgeting method based on logical depth. The method fully considers influence caused on the time sequence of a cross-module path by the physical distance and a clock deviation between two modules and obtains a more accurate and reasonable time sequence budgeting numerical value of each module port through the following steps of carefully analyzing the physical positions of the module port and a relevant boundary register and the logic depth of the cross-module path and carrying out the time delay calculation of an interconnection line, the ratio calculation of logic depth and clock deviation estimation, so that the iterations of the time sequence optimization of the cross-module path are reduced, and time sequence convergence in a chip design is quickened.

Description

Technical field [0001] The invention relates to a timing budget method in the back-end physical design of an integrated circuit, in particular to a hierarchical physical design. Background technique [0002] Timing closure is the key to today's chip design, and it is also the biggest challenge. In the hierarchical design, because the physical design of the top level and each sub-module is carried out in parallel, a key issue is to ensure the consistency of the timing closure of the sub-modules and the timing closure of the top level. A better timing budget is hierarchical An important prerequisite for rapid convergence and consistency of physical design timing. A reasonable timing budget is conducive to the closure of the design. On the contrary, an unreasonable timing budget will hinder the progress of the physical design of the sub-modules, thereby affecting the entire design cycle. How to give a reasonable timing budget according to the actual situation has become the key to...

AI Technical Summary

Problems solved by technology

A reasonable timing budget is conducive to the convergence of the design, on the contrary, an unreasonable timing budget will hinder the progress of the physical design of the sub-module, thereby affecting the entire design cycle

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