Memory erasing method and apparatus
A memory and register technology, which is applied in the direction of response to error generation and redundant code error detection, can solve the problems of increasing the time cost of erasing the memory and reducing the service life of the memory, so as to improve the service life, reduce the time cost and save The effect of time overhead
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[0076] In order to make the above objects, features and advantages of the present invention more comprehensible, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.
[0077] One of the core concepts of the embodiments of the present invention is to divide the entire memory erasing process into two parts: erasure verification and erasure. Specifically, the upper computer downloads a piece of assembly code used to realize the function of verification and erasure verification (full F verification) to the lower computer. When there is a target file that needs to be written to the lower computer, the lower computer can The code starts to perform erasure verification on the target area used to store the target file. When the erasure verification is completed, the upper computer judges whether to erase the target area according to the verification result fed back by the lower computer. Even in the cas...
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