LDPC (Low Density Parity Check) structure, codeword, corresponding coder, decoder and coding method

A technology of LDPC code and coding method, applied in LDPC structure, codeword and corresponding encoder, decoder and coding field, can solve the problems that affect the performance of LDPC codeword and are not suitable for decoding algorithm, etc.

Active Publication Date: 2015-07-15
SHANGHAI NAT ENG RES CENT OF DIGITAL TELEVISION
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Problems solved by technology

[0019] The purpose of the present invention is to provide a kind of S-IRA LDPC code word and corresponding coder, decoder and coding method, solve the problem brought by the structure of check matrix of common S-IRA LDPC code in the prior art It is not suitable for HSS (Horizontal shuffle scheduling) decoding algorithm and affects the performance of the entire LDPC code word

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  • LDPC (Low Density Parity Check) structure, codeword, corresponding coder, decoder and coding method
  • LDPC (Low Density Parity Check) structure, codeword, corresponding coder, decoder and coding method
  • LDPC (Low Density Parity Check) structure, codeword, corresponding coder, decoder and coding method

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[0057] However, when the existing HSS algorithm selects a cyclic sub-block, the cyclic sub-block is usually not a unit sub-block, but two or more unit sub-blocks, which will inevitably lead to memory access conflicts in the process of parallel operation. This is because if the loop sub-block is composed of more than two unit sub-blocks, when the loop sub-block is operating in parallel rows, there will be two rows of row operation inputs that require reading the same block of memory at the same time, and after the operation is completed Then write to the same block of memory at the same time. This not only fails to achieve the original intention of the HSS algorithm, but also causes memory conflicts.

[0058] Therefore, based on the shortcomings of the LDPC codeword structure in the existing standards, specifically, the cyclic sub-matrix in the information bit matrix may be composed of multiple cyclic identity matrices, which is not suitable for the implementation of the HSS ...

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Abstract

The invention discloses a novel structured irregular repeat accumulator (S-IRA)-type LDPC codeword, a corresponding coder, a decoder and a coding method. The codeword has a structure of H=[H'1piP'], H'1 is an information bit matrix, P' is a parity check bit matrix, piP' is to carry out row transformation on the parity check bit matrix, the information bit matrix H'1 comprises multiple cyclic sub matrixes pi,j, and each cyclic sub matrix can only be a unit cyclic shift matrix or an all-zero matrix. By adopting the technical scheme of the invention, through extensive simulation, a LDPC codeword information bit matrix structure more applicable to HSS decoding algorithm compared with the prior art is found out, a coder and a decoder using the LDPC code are found out, and the parity check bit matrix is further matched and improved, and performance of the LDPC code is enhanced. The invention also discloses a coding method corresponding to the above S-IRA structure, and a coder.

Description

technical field [0001] The present invention relates to a kind of LDPC code word and the coder that uses this code word, decoder, corresponding coding method, more specifically, relate to a kind of S-IRA LDPC code word and corresponding coder, decoder and coding method . Background technique [0002] Low density parity check codewords (Low density Parity Check, LDPC) can be divided into two types according to their structure, one is random codewords, the most classic one is MacKay code, he also has a special webpage to give him Various codewords (MacKay1999)(Richardson 2001)(Luby2001)(Richardson and Urbanke2001); another type is codewords designed based on the algebraic combinatorial structure (Combinatorial). Random codewords can approach the Shannon limit very well, but due to the randomness of the '1' distribution, the design of the encoder and the decoder are not feasible in parallel or regularity, so it is not suitable for systems that require a certain throughput , s...

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Application Information

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IPC IPC(8): H03M13/11H04L1/00
Inventor 张文军管云峰何大治徐胤史毅俊夏平建王尧
Owner SHANGHAI NAT ENG RES CENT OF DIGITAL TELEVISION
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