Device and method for predicting function return address

Abstract

A device for predicting a function return address comprises an instruction decoding unit, a function return address stack, an execution unit and an error correction unit. The instruction decoding unit is used for decoding an input instruction to generate an operation indicator; the function return address stack comprises S table entries and is used for performing return address prediction on a function return instruction to generate a predicated address A and a corresponding table entry index X; the execution unit is used for receiving the operation indicator of the instruction decoding unit and the predicated address A and the table entry index X of the function return address stack, judging whether the address A is predicated correctly or not when the operation indicator indicates the function return instruction, and generating prediction correctness information and an actual skip address; the error correction unit is used for receiving output of the execution unit, and correcting content directed by the table entry index X in the function return address stack by the actual address B when the function return address is predicated mistakenly. The invention further provides a method for predicting the function return address. By the device and the method, cost of the function return address stack is reduced effectively, and processor performance is improved.

Description

technical field [0001] The invention belongs to the field of microprocessors, in particular to a device and method for function return address prediction. Background technique [0002] The transfer instruction is one of the basic instructions of the processor and widely exists in the program. The transfer instruction will introduce the transfer of program control flow, which is one of the performance killers of the processor. Further, the branch instruction includes conditional branch instruction, unconditional branch instruction and indirect branch instruction. Among them, the function return instruction, as a kind of indirect transfer instruction, is frequently applied to the program return of sub-functions, which has a significant impact on the performance of the processor. In order to speed up the execution speed of function return instructions, middle and high-end embedded processors generally use function return address stacks to provide return address prediction for...

AI Technical Summary

Problems solved by technology

[0004] Studies have shown that, limited by the size of the function, the address offset of the function call is mostly within the range of 1Mb, so it is meaningless to save the high bits of the function return address in the function return address stack in most cases

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