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Reconfigurable-calculation hardware and software task partitioning method based on chaotic particle swarm optimization algorithm

A chaotic particle swarm and task division technology, applied in resource allocation, multi-programming devices, etc., can solve problems that affect application execution performance, lack, increase the difficulty of system management, etc.

Active Publication Date: 2014-12-31
CETC NINGBO MARINE ELECTRONICS RES INST
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, doing so will introduce problems such as data consistency and synchronization between tasks, which will increase the difficulty of system management.
The division of software / hardware tasks has always been a difficult point in the research of embedded systems, which directly affects the execution performance of applications, but so far lacks mature method support

Method used

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  • Reconfigurable-calculation hardware and software task partitioning method based on chaotic particle swarm optimization algorithm
  • Reconfigurable-calculation hardware and software task partitioning method based on chaotic particle swarm optimization algorithm
  • Reconfigurable-calculation hardware and software task partitioning method based on chaotic particle swarm optimization algorithm

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Embodiment Construction

[0035] A reconfigurable system can be simplified to consist of a main CPU and a reconfigurable device (FPGA). The CPU is mainly composed of a scheduler, a placer and a loader, which are responsible for the scheduling, placement and configuration loading of reconfigurable tasks, respectively.

[0036] The problem of partitioning software and hardware tasks in the reconfigurable computing model is an NP-Hard problem. The task to be divided is represented by a Data Flow Graph (Data Flow Graph—DFG), and the DFG of a computing task or program can be expressed as a triplet D=, where the vertex set V={v i |v i is an ordered operator, 1≤i≤n}. Each vertex represents a task, including hardware tasks and software tasks; edge set E={e ij | e ij =i ,v j >,1≤i,j≤n}, e ij means from v i to v jThe directed edge of v i is v j The direct predecessor node of v j is v i The direct successor node of , which represents the sequential dependency of two operators. e ij The physical meani...

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Abstract

The invention discloses a reconfigurable-calculation hardware and software task partitioning method based on a chaotic particle swarm optimization algorithm. The method is on the basis of a multi-objective optimization method of DFG diagram hardware and software task partitioning, factors, such as the operation execution time of modules and delay and resource consumption caused by data communication of the modules are considered comprehensively, a multi-objective optimization objective function Ffitness is designed, the maximum of the objective function can be searched by the chaotic particle swarm optimization algorithm when the predetermined constraint conditions are met, and the optimal solution is figured out.

Description

technical field [0001] The invention relates to the field of reconfigurable computing, in particular to a dynamic reconfigurable task scheduling method. Background technique [0002] For a reconfigurable system, due to the limitation of the scale of reconfigurable resources, it is often necessary to decompose it into multiple subtasks that occupy less resources. After a suitable software and hardware division scheme, it is divided into A series of software tasks and hardware tasks are respectively mapped to general-purpose processors and reconfigurable logic devices for execution, and tasks are allocated optimally. Control-intensive operations such as variable-length loops and branches are performed on general-purpose processors; computation-intensive operations are implemented on reconfigurable hardware. By implementing different assignments to different tasks, the configuration of each task is optimized, and the calculation acceleration of the task is realized. [0003] ...

Claims

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Application Information

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IPC IPC(8): G06F9/46G06F9/50
Inventor 朱志宇沈舒吴将王彪王逊陈迅李阳薛文涛黄巧亮
Owner CETC NINGBO MARINE ELECTRONICS RES INST
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