A monitoring method and device for a slave core state
A state and normalization technology, applied in the CPU application field, can solve the problems of the main core occupying a large amount of CPU time, increasing the burden of the main core, and reducing CPU performance, etc.
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[0020] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.
[0021] An embodiment of the present invention provides a monitoring method for a slave core state. The method is applied to a logic device, the logic device at least includes a timer module, and the logic device is connected to a CPU to be tested. The main core of the CPU to be tested is configured with N channels, and these channels correspond to the slave cores to be tested, where N is a natural number and the value of N is greater than or equal to the number of s...
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