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Processor Chip Simulation Debugging System

A debugging system and processor technology, applied in the direction of electrical digital data processing, special data processing applications, instruments, etc., can solve problems such as omissions and errors, affecting debugging efficiency, etc., and achieve the effect of reliable debugging

Active Publication Date: 2018-04-27
SHANGHAI HUAHONG INTEGRATED CIRCUIT
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] In the existing simulation debugging system, the above-mentioned configuration data information requires the user to manually judge whether to download the user program code after downloading or after the user program is reset, and manually complete the download operation in the integrated development environment, which not only affects the debugging efficiency, It is also prone to omissions and errors

Method used

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  • Processor Chip Simulation Debugging System

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Embodiment Construction

[0014] Referring to the drawings, the processor chip emulation and debugging system, in this embodiment, includes: an emulator 1 and an integrated development environment module 5 on a user computer.

[0015] The emulator includes an emulation management module 3 , an emulation chip 2 and a program data memory 4 . The integrated development environment module 5 is connected with the simulation management module 3 of the simulator 1 through the communication channel 7 . The emulation management module 3 is connected with the program data memory 4 through a data / address bus 8 , and the data / address bus 8 is connected with the emulation chip 2 at the same time.

[0016] The program data memory 4 stores user programs and user data. The emulation chip 2 can output a reset flag signal 9 to the emulation management module 3 . The input terminal of the emulator chip 2 has an external reset signal 10 input from the outside of the emulator 1 . There is a data information initializati...

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Abstract

The invention discloses a processor chip emulation debugging system, comprising: an emulator and an integrated development environment module on a user computer; the emulator includes an emulation management module, an emulation chip and a program data memory; the integrated development environment module passes The communication channel is connected with the emulation management module of the emulator; the emulation management module is connected with the program data memory and the emulation chip through the data / address bus; the integrated development environment module has a data information initialization configuration window, and the user configures the user program download , the target data configuration file and target address that need to be downloaded at the same time, and the target data configuration file and target address that need to be downloaded again when the emulator is reset by the user configuration. The invention can automatically complete the downloading of the configuration data information according to the configuration situation of the user.

Description

technical field [0001] The invention relates to a processor chip emulation debugging system. Background technique [0002] There are user programs developed by the user in the processor chip. In the writing and debugging of the user program, the tools used are generally the processor chip emulator and the debugging software on the user's computer-integrated development environment, and the two communicate with each other to complete the user. Program emulation debugging. The integrated development environment is a software platform for downloading and debugging user programs and an interface for debugging operations. It can download user codes to the emulator, control the reset of the emulator, and download data files to the emulator in the data area observation window. [0003] Different from the actual product chip, in order to ensure the versatility and meet the data modification requirements in user debugging, and consider factors such as service life and access speed, ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F17/50
Inventor 许国泰
Owner SHANGHAI HUAHONG INTEGRATED CIRCUIT
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