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Solid-state imaging device and manufacturing method therefor

A solid-state imaging device and semiconductor technology, which is applied in the direction of electric solid-state devices, radiation control devices, semiconductor devices, etc., can solve problems such as white spots, poor crystal quality, and poor semiconductor layers, and achieve the effect of improving sensitivity

Active Publication Date: 2014-01-01
PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0011] However, since the conventional solid-state imaging device forms a silicon layer or a semiconductor layer provided with a photoelectric conversion portion so as to be in contact with the reflective structure on the reflective structure, the formed silicon layer or semiconductor layer contains many crystal defects, which is different from that of a conventional solid-state imaging device. Compared with the bulk (bulk) substrate, the crystal quality is poor
Therefore, in the conventional solid-state imaging device, there are problems such as occurrence of white spots due to poor crystallization of the silicon layer or semiconductor layer forming the photoelectric conversion part.

Method used

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  • Solid-state imaging device and manufacturing method therefor

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no. 1 Embodiment approach

[0099] refer to Figure 1 to Figure 4 , the solid-state imaging device according to the first embodiment of the present invention will be described. In addition, this invention is not limited to the following embodiment. In addition, appropriate changes can be made without departing from the range in which the effects of the present invention are achieved. Furthermore, each embodiment can also be combined with other embodiment.

[0100] Such as figure 1 As shown, the solid-state imaging device 10 according to the first embodiment of the present invention is a MOS (Metal Oxide Semiconductor) image sensor (image sensor) in which a plurality of pixel units 11 are arranged in an array. The solid-state imaging device 10 has a pixel array region 12 including a plurality of pixel units 11 arranged in an array, a vertical shift register (shift register) 13 , a horizontal shift register 14 , an output circuit 15 , and an output terminal 16 .

[0101] The plurality of pixel units 1...

no. 2 Embodiment approach

[0119] refer to Figure 5 , the solid-state imaging device according to the second embodiment of the present invention will be described. In this embodiment, descriptions of the same configurations as those of the first embodiment are simplified or omitted, and only configurations different from those of the first embodiment will be described in detail.

[0120] Such as Figure 5 As shown, in the pixel array region 12 , an imaging region 40 into which light enters and an optical black region 41 shielded from light so that light does not enter are provided. Further, between the imaging region 40 and the optical black region 41 , a groove portion 42 a penetrating the silicon layer 33 , the semiconductor layer 32 and the insulator layer 31 and exposing the surface of the semiconductor substrate 30 is formed. The groove portion 42a has a hollow structure, or is buried in a silicon oxide film, a polysilicon film, or the like.

[0121] In the imaging region 40 where light enters,...

no. 3 Embodiment approach

[0124] Next, refer to Figure 6 , the solid-state imaging device according to the third embodiment of the present invention will be described. In this embodiment, descriptions of the same configurations as those of the first embodiment are simplified or omitted, and only configurations different from those of the first embodiment will be described in detail.

[0125] Such as Figure 6 As shown, in the pixel array region 12, a plurality of photodiodes 34 are formed, and between adjacent photodiodes 34, a groove portion that penetrates the silicon layer 33, the semiconductor layer 32, and the insulator layer 31 and exposes the surface of the semiconductor substrate 30 is formed. 42b. The groove portion 42b has a hollow structure, or is buried in a silicon oxide film, a polysilicon film, or the like. Additionally, if Figure 6 As shown, the groove portion 42b is preferably formed at a position that does not affect the characteristics of the transfer transistor and the like. ...

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Abstract

A solid-state imaging device comprises a substrate (30), an insulating layer (31) formed on top of the substrate (30), a semiconducting layer (32) formed on top of the insulating layer (31), and a silicon layer (33) formed on top of the semiconducting layer (32). The silicon layer (33) has a plurality of pixel units each including a photoelectric conversion unit (34) converting light to a signal charge and a circuit reading the signal charge, and the refractive index of the insulating layer (31) is lower than the refractive index of the semiconducting layer (32).

Description

technical field [0001] The present invention relates to a solid-state imaging device and a manufacturing method thereof, and more particularly to a solid-state imaging device such as a MOS image sensor in which pixel portions including a photoelectric conversion portion are arranged in an array, and a manufacturing method thereof. Background technique [0002] In recent years, solid-state imaging devices have been desired to have higher image quality and miniaturization, but there is a physical limit to miniaturization of pixel size, and a reduction in sensitivity accompanying miniaturization is also a serious problem. [0003] Conventional solid-state imaging devices that solve these problems are proposed, for example, in Patent Document 1 and Patent Document 2 . Below, refer to Figure 15 as well as Figure 16 , the conventionally known first solid-state imaging device and second solid-state imaging device will be described. [0004] Such as Figure 15 As shown, in the c...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/146
CPCH01L27/14685H01L27/1462H01L27/1463H01L27/14689H01L27/1464H01L27/14632H01L27/14687
Inventor 冲野彻森三佳广濑裕加藤刚久田中毅
Owner PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO LTD
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