Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Method and device for eliminating clock jitter in analog-to-digital conversion and digital pre-distortion method

A technology of clock jitter and analog-to-digital conversion, applied in the direction of physical parameter compensation/prevention, improving amplifiers to reduce nonlinear distortion, etc., can solve the problem of deteriorating digital signal signal-to-noise ratio, affecting digital pre-distortion performance, and not considering the impact of clock jitter and other issues to achieve the effect of improving linearization performance, eliminating clock jitter, and improving accuracy

Active Publication Date: 2013-10-09
UNIV OF ELECTRONICS SCI & TECH OF CHINA
View PDF5 Cites 8 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the influence of the clock jitter introduced by the analog-to-digital converter in the feedback path is not considered in the traditional DPD method
Especially for wideband signals, this clock jitter will deteriorate the signal-to-noise ratio of the sampled digital signal and affect the performance of digital predistortion

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Method and device for eliminating clock jitter in analog-to-digital conversion and digital pre-distortion method
  • Method and device for eliminating clock jitter in analog-to-digital conversion and digital pre-distortion method
  • Method and device for eliminating clock jitter in analog-to-digital conversion and digital pre-distortion method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0047] All the features disclosed in this specification, or all disclosed methods or steps in the process, except for mutually exclusive features and / or steps, can be combined in any manner.

[0048] Any feature disclosed in this specification, unless specifically stated, can be replaced by other equivalent or equivalent alternative features. That is, unless otherwise stated, each feature is just one example of a series of equivalent or similar features.

[0049] Such as figure 1 , figure 2 An embodiment of the method for eliminating clock jitter in the analog-to-digital conversion process includes:

[0050] Step 1: Receive the analog signal z(t)109.

[0051] Step 2: Provide the clock signal h(t)205 to the analog-digital conversion module, h(t)=cos(2πf s t+β(t)), f s Indicates the clock frequency of the selected crystal oscillator (the value is a known value), and β(t) represents the phase noise. At the same time, the product of the clock signal h(t) 303 and a tone signal m(t) 304 ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses a method and device for eliminating clock jitter in analog-to-digital conversion and a digital pre-distortion method and relates to the pre-distortion technology in the communication field. The method for eliminating clock jitter in analog-to-digital conversion is characterized by comprising the steps that step 1, an analog signal z (t) is received; step 2, a clock signal h (t) is offered to an analog-to-digital conversion module, meanwhile, an arithmetic product of the clock signal h (t) and a single-tone signal m (t) serves as a reference signal q (t) and is added to the analog signal z (t), so that a composite signal r (t) is obtained; step 3, analog-to-digital conversion is conducted on the composite signal r (t) through the analog-to-digital conversion module, so that two completely identical composite signals rjit (n) are obtained; step 4, after a jitter sequence of one of the two composite signals rjit (n) is estimated, a clock jitter sequence is obtained; step 5, clock jitter elimination is conducted on the other of the two composite signals rjit (n) through clock jitter sequence, so that a purified digital signal y (n) with clock jitter eliminated is obtained.

Description

Technical field [0001] The present invention relates to predistortion technology in the communication field, in particular to a method and device for eliminating sampling clock jitter interference in a digital predistortion feedback path, and a predistortion method for eliminating clock jitter interference. Background technique [0002] The power amplifier (Power Amplifier PA) is one of the core components in the modern mobile communication system, and its performance directly affects the performance of the wireless communication system. In order to improve efficiency, the amplifier usually works in a high efficiency region close to the saturation point, where the amplifier has nonlinear characteristics. Since the current communication signal has a non-constant envelope, it will produce intermodulation distortion and spectrum hyperplasia after nonlinear amplification, causing adjacent channel interference and worsening the receiver's bit error rate. To solve this problem, digita...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): H03M1/08H03F1/32
Inventor 刘颖潘文生邵士海唐友喜
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com