Quasi-cyclic matrix high-speed multiplier in deep space communication based on lookup table

Abstract

The invention provides a quasi-cyclic matrix high-speed multiplier in deep space communication based on a lookup table, and is used for realizing multiplication of a vector m and a quasi-cyclic matrix F in triangular encoding under multi-code quasi-cyclic low density parity check (QC-LDPC) approximation in the consultative committee for a space data system (CCSDS). The multiplier comprises four product lookup tables which are used for pre-storing possible algebraic sum of all generated polynomials in a binary field in block rows of all code matrixes F, four 2,048-bit binary summators for performing modulo-2 adding on outputs of the product lookup tables and contents of shift registers, and four 2,048-bit shift registers for storing the sum which is cyclically shifted 1 bit leftwards. The quasi-cyclic matrix high-speed multiplier is compatible with all the code types, so that the number of storage devices and logic resources are reduced; and the quasi-cyclic matrix high-speed multiplier has the advantages of simple structure, low power consumption, low cost and the like.

Description

Technical field [0001] The invention relates to the field of channel coding, in particular to a quasi-circulant matrix high-speed multiplier in the CCSDS deep-space communication standard multi-code QC-LDPC approximate lower triangular coding. Background technique [0002] Low-Density Parity-Check (LDPC) code is one of the efficient channel coding technologies, and QC-LDPC (Quasic-LDPC, QC-LDPC) code is a special LDPC code. The generator matrix G and the check matrix H of the QC-LDPC code are both arrays composed of cyclic matrices, which have the characteristics of segmented cyclic, so they are called QC-LDPC codes. The first row of the circulant matrix is ​​the result of the last row cyclically shifted to the right by 1 bit, and the remaining rows are the result of the previous row cyclically shifted to the right by 1 bit. Therefore, the circulant matrix is ​​completely characterized by its first row. Usually, the first row of the circulant matrix is ​​called its generator pol...

AI Technical Summary

Problems solved by technology

The disadvantage of this solution is that the number of registers is large, and a large number of AND gates are required to complete the multiplication operation and a large number of XOR gates to complete the addition operation. Too many small ROMs will waste memory resources, which will cause high power consumption and high cost of the circuit.

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