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Fault detection method of analog circuit

A technology for analog circuit and fault detection, applied in analog circuit testing, electronic circuit testing, etc., can solve the problems of long test time, inability to fully meet the actual needs of the project, and insufficient test information

Inactive Publication Date: 2013-08-28
UNIV OF ELECTRONIC SCI & TECH OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] Traditional analog circuit fault detection methods are only performed in a single frequency domain or time domain. Due to the insufficient test information obtained by a single time domain or frequency domain analysis method, the complexity of the circuit under test continues to increase and the Under the higher and more stringent requirements of test quality, this single time-domain or frequency-domain analysis method seems to be unable to fully meet the actual needs of engineering
For example, a single time-domain test method needs to rely on the quantification of the voltage or current output of the circuit under test, and make a judgment on the circuit under test based on the quantified value; Monitoring makes the test time-consuming. At the same time, because the specifications of the circuit under test often include frequency domain indicators, the test is performed only from the time domain, so that the relationship between the output and the frequency domain performance indicators of the circuit under test is not directly related, resulting in some Defects that cannot be effectively distinguished from faults
There are also many shortcomings in testing from the frequency domain alone. For example, the existing testing methods based on the frequency domain often only consider the amplitude-frequency characteristics of the circuit under test, but do not consider the phase-frequency characteristics of the circuit under test. Some faults cannot be effectively distinguished, or the robustness of the test method is not good, etc.

Method used

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Embodiment 1

[0063] Such as figure 1 , figure 2 , image 3 shown. The international benchmark jumping frog circuit is selected to verify the analog circuit fault detection method of the present invention. The fault detection method steps of the analog circuit are as follows:

[0064] (1) Set the parameters of each component of the analog circuit under test as nominal parameters, that is, figure 2 R in 1 ~R 13 =10KΩ, C 1 =C 4 =10nF, C 2 =C 3 =20nF, image 3 C in 1 =6pF. The tested analog circuit is simulated in HSPICE, the input VIN is a 1kHz sine wave with an amplitude of 3V, the output VOUT is sampled at 100K sps, and 2048 points are stored each time to obtain the circuit output response sequence under the nominal parameters.

[0065] (2) Within the tolerance range of the nominal parameters of each component of the analog circuit under test, conduct 2000 Monte Carlo simulations on the analog circuit under test to obtain 2000 circuit output response sequences.

[0066] (3) ...

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Abstract

The invention discloses a fault detection method of an analog circuit. The method includes a first step of carrying out complex cross wavelet transform on circuit output response sequences (Sn) under nominal parameters, extracting sensitive information (recorded as I), and obtaining relative amplitude / phase reference value sequences (Sr), a second step of obtaining normal circuit output response sequences through Monte-Carlo simulation, carrying out the complex cross wavelet transform with the Sn sequences respectively, extracting the sensitive information I, and obtaining relative amplitude / phase simulation value sequences (Ss), a third step of enabling the Ss sequences to be normalized with the Sr sequences respectively, and obtaining the scope (Ra-p) of the relative amplitude / phase values of normal circuit output response, a fourth step of carrying out the complex cross wavelet transform on unknown circuit actual measurement output response sequences and the Sn sequences, extracting the sensitive information I, and then obtaining actual measurement relative amplitude / phase value sequences (St), a fifth step of carrying out normalization on the Sr sequences and the St sequences, and obtaining unknown circuit output response relative amplitude / phase values (Va-p), and a sixth step of comparing the Va-p and the Ra-p, and determining whether the detected circuits have faults. Compared with the prior art, the fault detection method is high in detection precision, and high in fault coverage rate.

Description

technical field [0001] The invention belongs to the field of circuit testing, in particular to a fault detection method for an analog circuit. Background technique [0002] With the development of today's science and technology, circuit design is becoming more and more complex, and its manufacturing cost is required to be lower and lower, which makes circuit fault detection a relatively expensive task. Among them, the fault detection of analog circuits is often more complicated, mainly due to the lack of fault models, the tolerance of components and the nonlinear characteristics of circuits. Especially for parametric faults in analog circuits, since parametric faults occur in analog circuits where R, L, C and other components deviate from normal values ​​with changes in working conditions, the detection of parametric faults requires a sufficiently sensitive test method. Changes in system performance caused by changes in component parameters can be detected. [0003] Tradit...

Claims

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Application Information

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IPC IPC(8): G01R31/316
Inventor 谢永乐毕东杰周启忠李西峰谢暄袁太文
Owner UNIV OF ELECTRONIC SCI & TECH OF CHINA
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