Device with through-silicon via (tsv) and method of forming the same

Abstract

A device with through-silicon via (TSV) and a method of forming the same includes the formation of an opening in a silicon substrate, the formation of a first insulation layer on the sidewalls and bottom of the opening, the formation of a second insulation layer on the sidewalls and bottom of the opening. A first interface between the first insulation layer and the silicon substrate has an interface roughness with a peak-to-valley height less than 5 nm. A second interface between the second insulation layer and the conductive layer has an interface roughness with a peak-to-valley height less than 5 nm.

Description

technical field [0001] The present invention relates to integrated circuit fabrication, and more particularly, to through-silicon via (TSV) fabrication. Background technique [0002] Three-dimensional system-in-package (3D-SiP) technology is driven by the strong demand for high-speed, high-density, small-size, and multifunctional electronic devices. Through-silicon-via (TSV) interconnection is popular as a form of 3D integration due to its shorter interconnection distance and faster speed. To address the need for flip-chip packaging technology, silicon (Si) interposers with TSVs have been proposed as a means of providing high write density interconnects, enabling interposers between die and interposer due to short interconnects from chip to substrate. A good solution for minimizing the coefficient of thermal expansion (CTE) mismatch and improving electronic performance. There are multiple steps involved in the TSV process that can successfully address packaging technology ...

AI Technical Summary

Problems solved by technology

Sidewall insulation roughness is a challenging bottleneck in TSV process

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