Offset voltage elimination technology for differential time domain comparator

A time-domain comparator, offset voltage technology, applied in multiple input and output pulse circuits, instruments, electrical components, etc., can solve problems that affect the performance of high-precision successive approximation analog-to-digital converters and cannot be completely eliminated.

Inactive Publication Date: 2011-04-27
FUDAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, its imbalance cannot be eliminated by the above two methods
Digital correction technology can be used to adjust the value of components in the time domain comparator to reduce the offset of the time domain comparator, but it cannot be completely eliminated, which will affect the performance of the high-precision successive approximation analog-to-digital converter

Method used

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  • Offset voltage elimination technology for differential time domain comparator
  • Offset voltage elimination technology for differential time domain comparator
  • Offset voltage elimination technology for differential time domain comparator

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Embodiment Construction

[0048] The present invention will be described in further detail below in conjunction with the accompanying drawings.

[0049] figure 1 Shown is a system structure diagram of an offset voltage elimination technology that can be used in a differential time domain comparator circuit provided by the present invention, including a charge pump and a switch circuit (1), an absolute value comparison circuit (2), and an offset compensation tube A differential voltage time conversion circuit (3), a frequency and phase detection circuit (4), a phase detection circuit (5) and an output generation circuit (6).

[0050] figure 2 It is a schematic diagram of the timing relationship of some digital signals in the present invention. During offset_enable equal to 1, figure 1 The circuit shown works in the state of offset cancellation, and when offset_enable is equal to 0, figure 1 The circuit shown works in a comparative working state.

[0051] image 3 It is the circuit diagram of the ...

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PUM

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Abstract

The invention belongs to the technical field of sequential approximation analogue to digital converters and relates to offset voltage elimination technology for a differential time domain comparator circuit. In the technology, a charge pump, a switch circuit, an absolute value comparison circuit, a differential voltage time change-over circuit with an offset compensation tube, a frequency discrimination and phase discrimination circuit, a phase discrimination circuit and an output generating circuit are arranged. The technology can be applied to a low-speed and high-accuracy sequential approximation analogue to digital converter with a differential structure, can eliminate the offset voltage of a differential time domain comparator circuit and can be used for realizing low-power consumption and high-accuracy comparison. When the technology is applied to the sequential approximation analogue to digital converter, circuit consumption can be lowered, the influence of direct current offset of the comparator on the performance of the analogue to digital converter is eliminated and the accuracy of the analogue to digital converter is enhanced.

Description

technical field [0001] The invention belongs to the technical field of successive approximation analog-to-digital converters, and relates to an offset voltage elimination technology that can be used in a differential time-domain comparator circuit. Background technique [0002] Analog-to-digital converters are an important part of mixed-signal systems and come in a variety of configurations. Due to its low power consumption and small chip area, successive approximation analog-to-digital converters are widely used in several fields that do not require high speed of analog-to-digital converters, such as interface circuits for microcontrollers, portable devices, and implanted biosensors, etc. [0003] The successive approximation analog-to-digital converter disclosed in the prior art is composed of a digital-to-analog converter, a comparator and some digital logic circuits. Its accuracy is determined by the accuracy of the digital-to-analog converter and the accuracy of the c...

Claims

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Application Information

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IPC IPC(8): H03K19/003H03K5/24H03M1/38
Inventor 易婷洪志良
Owner FUDAN UNIV
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