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Chaotic key-based data encryption transmission card

A data encryption and key technology, applied in the field of communication engineering, can solve problems such as insecurity, achieve the effect of solving complex computing problems, improving computing speed and deciphering difficulty

Inactive Publication Date: 2010-05-26
HEILONGJIANG UNIV +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Although there are many encryption algorithms, such as DES, RSA, MD5 algorithm, etc., almost all of them are imported from abroad. They can be used for ordinary information encryption, but there are unsafe factors for national defense military secrets or information encryption of key government departments.

Method used

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  • Chaotic key-based data encryption transmission card
  • Chaotic key-based data encryption transmission card
  • Chaotic key-based data encryption transmission card

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0024] Example 1: Combining figure 1 , the present invention is a data encryption transmission card based on a chaotic key, which is composed of a standard RS-232 transceiver and an FPGA encryption chip, and the standard serial data sent by the serial port of the PC is demodulated by the standard RS-232 transceiver The standard TTL level is sent to the I / O port of the FPGA encryption chip. After being encrypted by the FPGA encryption chip, it is modulated by the RS-232 transceiver to a standard 232 level and sent to the communication channel.

[0025] The present invention also has the following technical characteristics:

[0026] Described FPGA encryption chip comprises chaotic key sequence module, control module, data encryption and decryption module and asynchronous serial sending and receiving module, under the control of control module, produces key sequence by chaotic key sequence module, provides data encryption The decryption module encrypts and decrypts, and the proc...

Embodiment 2

[0029] Example 2: Combining figure 1 , figure 2 , image 3 , the present invention is a data encryption transmission card based on a chaotic key, which is composed of an encryption chip and a peripheral circuit of the data encryption transmission card, and the encryption chip based on a chaotic key is housed on the described data encryption transmission card; the encryption The chip is composed of a chaotic key sequence module, a control module, a data encryption and decryption module, and an asynchronous serial sending and receiving module; the encryption chip based on the chaotic key performs data exchange through the RS232 interface, so that ordinary data can be encrypted and safely transmitted.

[0030] Data sending process: The packaged data sent by the test software is sent to the modem chip through the serial port of the PC for logic level conversion, and it sends the converted data to the asynchronous serial receiver of the data encryption channel At this time, the ...

Embodiment 3

[0032] Example 3: Binding image 3 , Figure 4 , Figure 6 , the present invention is a kind of data encryption transmission card based on chaotic key, and its composition comprises data encryption transmission card, and the encryption chip based on chaotic key sequence is housed on the data encryption transmission card, and the encryption chip is composed of chaotic key sequence module, main control module , Data encryption and decryption module and asynchronous serial sending and receiving module.

[0033] The data encryption and decryption module is an improved A5 sequence cipher. On the basis of the original A5 sequence cipher, the chaos module is introduced as the initial data input and participates in the A5 cipher operation, which enhances the difficulty of password deciphering. More importantly, it uses VHDL programming to realize High-speed hardware encrypted transmission. In the circuit implementation, the bit signal of the extracted LFSR (LFSR, Linear Feedback Sh...

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PUM

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Abstract

The invention aims to provide a chaotic key-based data encryption transmission card in which a chaotic key sequence is applied to the data encryption transmission card and which has high secrecy performance, high computing speed and high integration level of an encryption chip. The chaotic key-based data encryption transmission card consists of a standard RS-232 transceiver and an FPGA encryption chip; standard serial data sent by a serial port of a PC is demodulated into standard TTL level through the standard RS-232 transceiver, is sent to the I / O port of the FPGA encryption chip, is encrypted by the FPGA encryption chip and then is modulated into standard 232 level through the standard RS-232 transceiver and sent to a communication channel. A hardware-based chaos algorithm is applied to the data encryption transmission card to form the chaotic key-based data encryption transmission card with high secrecy performance. The chaotic key-based data encryption transmission card is suitable for vital departments such as banks, enterprises and the like, implements point-to-point encryption on information transmitted by important secret departments, and ensures the security of data transmission.

Description

(1) Technical field [0001] The invention relates to communication engineering, in particular to a data encryption transmission card based on a chaotic key. (2) Background technology [0002] At present, the design of data encryption transmission cards at home and abroad is in its infancy. Mainly adopt the following two aspects of technology: completely convert foreign public algorithms, such as DES algorithm, RSA algorithm, MD5 algorithm, SHA-1 algorithm, etc. Download to the chip to form an encryption chip. The original program for implementing the encryption algorithm is solidified inside the encryption card chip, which seems to make the encryption algorithm closer to the running speed of the hardware, but the core is to bind the algorithm to the software environment, and the speed of the system to encrypt data depends on the operating frequency of the CPU , and we know that there is currently a bottleneck problem in the operating frequency of the CPU, which to a certain...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L9/00H04L29/06
Inventor 丁群杨自恒周平叶爱平
Owner HEILONGJIANG UNIV
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