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Chip and manufacturing method thereof

A chip and lining technology, applied in the field of chip and its manufacturing, can solve problems such as damage and impact on chip yield

Inactive Publication Date: 2010-03-10
RAYDIUM SEMICON
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] On the other hand, the corner area of ​​the chip is often damaged by the stress generated by the packaging process, which affects the chip yield

Method used

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  • Chip and manufacturing method thereof
  • Chip and manufacturing method thereof
  • Chip and manufacturing method thereof

Examples

Experimental program
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Embodiment Construction

[0047] see Figure 2A , Figure 2A is a schematic diagram of a chip 1 according to a specific embodiment of the present invention. Such as Figure 2A As shown, the chip 1 includes a plurality of first conductive pads 10 and a plurality of second conductive pads 12 approximately in the shape of water droplets. The first conductive linings 10 and the second conductive linings 12 are arranged alternately in a predetermined direction D, respectively. Each first conductive lining 10 includes a first portion P1 and a second portion P2 corresponding to the first portion P1 , and the length of the first portion P1 along the predetermined direction D is greater than the length of the second portion P2 along the predetermined direction D. Each second conductive lining 12 includes a third portion P3 and a fourth portion P4 relative to the third portion P3, and the length of the third portion P3 along the predetermined direction D is greater than that of the fourth portion P4 along the p...

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Abstract

The invention discloses a chip and a manufacturing method thereof. The manufacturing method of the chip comprises the following steps that a plurality of first conductive lining sheets are arranged along one direction of the chip; each first conductive lining sheet comprises a first part and a second part that corresponds to the first part; the length of each first part along the direction is morethan the length of each second part along the direction; the chip is provided with a plurality of second conductive lining sheets that are staggered to the first conductive lining sheets; each secondconductive lining sheet comprises a third part and a fourth part that corresponds to the third part; and the length of each third part along the direction is more than the length of each fourth partalong the direction, wherein the direction from the third part to the fourth part is reverse to the direction from the first part to the second part. The chip and the manufacturing method thereof canlead the conductive lining sheet to be densely arranged on the chip, and the design of the conductive lining sheet at the corner can reduce the pressure damage due to the encapsulation process of thechip.

Description

[0001] This application is a divisional application of the invention patent application with the filing date of October 29, 2007, the title of the invention is "chip and its manufacturing method", and the application number is 200710165130.0. technical field [0002] The present invention relates to a chip and its manufacturing method, and in particular, the present invention relates to a chip with a denser arrangement of conductive pads and a conductive pad design that can reduce pressure damage at the corner of the chip and its manufacturing method. Background technique [0003] In recent years, due to the rapid development of semiconductor technology, the functions of chips have become more and more diversified. Correspondingly, the circuit design required for the function of the chip is becoming more and more complex, so that on a single chip, the number of conductive pads acting as contacts for providing electronic signals increases accordingly. When the number of condu...

Claims

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Application Information

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IPC IPC(8): H01L23/482H01L21/60
CPCH01L24/05H01L24/06H01L2224/04042H01L2224/05552H01L2224/05554H01L2224/06179H01L2224/48091H01L2224/48227H01L2224/48228H01L2224/48465H01L2224/49109
Inventor 左克扬王威徐嘉宏周忠诚
Owner RAYDIUM SEMICON
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